CPO Is No Longer "Crying Wolf": NVIDIA's Volume Shipments and the Endgame for Scale-Up | TSMC COUPE, the Modulator Battle, and Supply-Chain Restructuring

Introduction

CPO (Co-Packaged Optics) has been talked about for a decade, and in 2025 it finally got its "iPhone moment." CPO used to be mocked as "the technology that will definitely happen next year," but with NVIDIA formally rolling out the Quantum-X800 Q3450 CPO switch, it is no longer just a vision on a slide. STT has to point out a counterintuitive truth: on the surface this wave of CPO is driven by power savings, but the real killer application is unlocking density for "scale-up." When NVLink's copper reach is squeezed below 2 meters and SerDes power rises exponentially, optics is no longer an option — it's the only solution at the physical limit. This article breaks down why NVIDIA chose this moment to bet on CPO, and how TSMC COUPE became the arsenal for this fight.

Key Insights

1. Technology Takes Shape: Scale-Out Is Just Training, Scale-Up Is the Battlefield

Looking at industry data, we see an interesting "expectation gap." The market broadly believes CPO is meant to rescue the total power of AI clusters, but according to SemiAnalysis's model, deploying CPO only in the back-end network (scale-out) saves about 23% of network power — yet affects the total power of a full NVL72 cluster by only about 2-4%.

What does that mean? CPO's adoption in scale-out is more about "training the troops" and building supply-chain confidence. The real inflection point is scale-up (intra-rack interconnect).

Today (copper): NVLink bandwidth is high (7.2T/14.4T per GPU), but copper's physical limits keep reach under 2 meters, confining AI's "world size" to one or two racks.

Tomorrow (CPO): CPO offers several times the bandwidth density of copper, with no distance limit. That means future GPU memory pooling and hyperscale GPU interconnect must rely on CPO to break through the physical boundary of the rack.

2. Packaging Differentiation: TSMC COUPE Becomes the Standard

On the CPO packaging battlefield, Broadcom previously used FOWLP (Fan-Out Wafer-Level Packaging), but its future roadmap has clearly shifted to TSMC COUPE (Compact Universal Photonic Engine).

This isn't just a name change — it's a step up in technology tier:

3D stacking (SoIC): TSMC COUPE uses SoIC-X to stack the EIC (electronic IC, e.g. driver/TIA, on N6) directly on top of the PIC (photonic IC, on N65) in 3D.

Bumpless: Conventional bump connections suffer from parasitic capacitance that limits bandwidth. COUPE achieves bumpless connections, which is critical for pushing **200G/lane** and eventually 400G/lane — and is the main reason Broadcom, despite its own packaging experience, has to lean on TSMC.

3. The Modulator Deep End: MRM's Comeback vs. EAM's Potential

For the core component inside the optical engine — the modulator — two very different technology routes have emerged:

• NVIDIA/TSMC camp (MRM, micro-ring modulator):

  • Surprisingly, NVIDIA's Quantum-X800 CPO uses a 200G PAM4 MRM.

  • STT view: The industry used to believe MRMs were too temperature-sensitive (thermal drift) to mass-produce. NVIDIA has shown that with TSMC's process control and advanced thermal compensation, the MRM's small footprint (two orders of magnitude smaller than an MZM) and low power can be realized. That's a huge engineering milestone.

• Celestial AI camp (EAM, electro-absorption modulator):

  • Celestial AI chose the EAM, emphasizing thermal stability. An EAM can tolerate an instantaneous 35°C temperature swing without complex calibration — a very attractive property for scale-up applications that sit right next to a hot GPU.

Chain Reaction

1. Supply-Chain Restructuring: From "Optical Module Makers" to "Packaging Integration"

CPO is reshaping how value is distributed across the traditional optical communications supply chain:

Losers?: Traditional DSP suppliers and assembly-only transceiver vendors risk having their value diluted, because the DSP is removed and the optical engine is packaged at the wafer level.

New roles: Traditional module makers (e.g. Innolight, Coherent) are transforming into CPO integrators or ELS (external light source) suppliers. Because the laser is the component most likely to fail, NVIDIA's architecture insists on a pluggable external light source (ELS), which preserves room for module makers to survive.

2. Competitor Moves

Broadcom: A CPO pioneer with two product generations, Humboldt and Bailly, but now shifting its focus to the TSMC COUPE platform — a sign the ecosystem is converging.

Intel: Has solid silicon photonics technology (OCI), but its integration path is relatively closed.

Celestial AI: A dark horse worth watching. Marvell has stepped in via acquisition/investment, and its Photonic Fabric targets the disaggregation of memory and compute — potentially a secret weapon for next-generation ASICs such as AWS Trainium 4.

Simple Tech Trend's Conclusion

We believe the 2025 launch of NVIDIA's CPO switch matters more symbolically than in actual overall energy savings. This isn't a stopgap for "saving a bit of power" — it's infrastructure being laid for the Feynman and Rubin Ultra generations.

Bottom line: Scale-out CPO (e.g. Quantum-X800) is the opening skirmish, meant to clear the supply chain and prove reliability (Meta data shows CPO MTBF is 5x that of pluggable modules). The real endgame is scale-up, when copper exits completely and optics sits right next to the GPU (optical interposer).

• Indicators to watch (next 6-12 months):

  1. ELS standardization: Will ELS specs across vendors converge? That determines operating cost.

  2. 200G MRM yield: Whether NVIDIA can mass-produce 200G MRMs at scale is the key test of TSMC's SiPh process maturity.

  3. Broadcom x OpenAI: Watch whether Broadcom brings CPO into OpenAI's in-house chip — that would signal CPO entering mainstream ASICs.