From Wafers to Royalties: Deconstructing the Silicon Photonics (SiPh) Fabless Business Model

1. From Wafers to Royalties: Deconstructing the SiPh Fabless Business Model

1.1 Why Understand SiPh Fabless?

Over the past few years, silicon photonics has gone from a "lab technology" to one of the core infrastructure building blocks for AI data centers, cloud, and high-performance computing.

Along the way, the industry has broadly split into two paths:

• Vertical Integration Giants such as Broadcom, Intel, Cisco, and NVIDIA integrate all the way down — from the SiPh process to optical engines, modules, and systems.

• Fabless No fab and no front-end manufacturing; instead, these companies focus on silicon photonics design, IP, and optical engines, and leave manufacturing to foundries.

This article focuses on the second path: the SiPh fabless model.

1.2 Three Questions This Article Answers

1. How does the SiPh fabless business model actually work?

2. How does it fundamentally differ — commercially and technically — from the vertical integration of tech giants?

3. How does a fabless company convince customers that "this design can really be productized and mass-produced"?

2. What Is the SiPh Fabless Business Model?

2.1 Definition: SiPh Companies That Design and License IP, Not Build Fabs

The SiPh fabless model rests on two core points:

• No wafer fab of its own No investment in front-end process equipment or production lines.

• Focus on design and IP Including PICs (Photonic Integrated Circuits), optical engine architecture, layout, GDS, and PDK-based design flows.

Manufacturing is outsourced to:

• Tower Semiconductor

• GlobalFoundries

• TSMC

• AMF (Advanced Micro Foundry)

• imec / CEA-Leti (R&D + MPW platforms)

which handle volume production.

2.2 The Core Work of a Fabless Company: SiPh Chip / PIC Design

2.2.1 Products and Design Focus

A fabless company's core assets are:

• Photonic integrated circuit (PIC) architecture design

• Application-specific reference designs, for example:

  • 400G / 800G / 1.6T data center transceivers

  • Optical I/O / chip-to-chip interconnect

  • LiDAR (FMCW / OPA / FPA)

  • Sensors of all kinds (biomedical, gas, electronic nose, etc.)

2.2.2 What Customers Receive

Fabless companies typically offer:

• Ready-to-order PIC / optical engine chips

• GDS / IP licensing, so customers can tape out at the foundry themselves

• System-level reference architectures that shorten customers' product development time

2.3 Relying on Specialty Foundries for Manufacturing

2.3.1 Typical Manufacturing Flow

Fabless companies never touch wafer manufacturing. Instead, the division of labor looks like this:

1. Complete the design and layout based on the SiPh PDK
   

2. Hand the GDS to a partner foundry (Tower, GF, TSMC, etc.)

3. The foundry runs the process and produces the wafers

4. Packaging / test partners complete the back-end flow

5. The fabless company delivers chips or optical engines to customers — or supplies only the IP / GDS

2.3.2 Benefits for the Fabless Company

This division of labor brings:

• No massive CapEx (building fabs, expanding capacity)

• Direct access to the yield and economies of scale of mature processes

• Focus on architecture and product definition rather than process maintenance

2.4 A Design Flow Built Around the PDK (Process Design Kit)

2.4.1 The Role of the PDK

The PDK is what makes or breaks SiPh fabless in practice.

PDKs are provided by foundries and include:

• Validated SiPh components:

  • waveguides, MMIs, grating couplers, splitters / combiners

  • modulators, photodiodes, tapers, fiber couplers, etc.

• Layout and design rules:

  • Line width, spacing, bend radius, layer definitions

• Simulation models:

  • S-parameters, compact models

  • Interfaces to electrical / thermal models

2.4.2 Design Tools and Flow

Typical tools and flow:

• Luceda Photonics IPKISS

• SiPh design tools from Synopsys / Lumerical / VPI and others

• Integrating the PDK with design tools enables a complete flow from schematic → layout → simulation → tape-out.

2.4.3 OpenLight's PDK Ecosystem

Take OpenLight as an example:

• OpenLight's PDK is integrated into Luceda IPKISS

• Design houses such as Spark Photonics and VLC Photonics can:

  • Use the OpenLight PDK to do layout / design for customers

  • Connect directly to Tower's process platform

2.5 Wafer-Level Prototype Testing

2.5.1 What Is Tested and Why

To convince customers that "this is not a paper demo but a product-ready design," fabless companies often run wafer-level:

• Electrical measurements: eye diagrams, BER, S-parameters

• Optical measurements: IL, ER, RIN, responsivity

Wafer-level probing makes it possible to:

• Screen out bad dies early

• Understand performance distribution across the whole wafer

• Raise overall post-packaging yield

2.5.2 Sicoya's Approach

Sicoya uses:

• Monolithic integration of electronics and photonics

• Simultaneous wafer-level testing of optical / electrical characteristics

to gain an edge in cost and yield and support high-volume shipments.

2.6 The IP & Royalty Model

2.6.1 Typical IP Revenue Structure

Common fabless IP revenue models:

1. Provide GDS / IP licenses to customers

2. Customers take the layout and PDK and place orders with the foundry

3. For every wafer shipped / every set volume of dies, the fabless company collects a royalty

2.6.2 The OpenLight Example

• OpenLight:

  • Provides the design and PDK

  • Delivers the GDS to the customer

• Customer:

  • Orders PIC production directly from Tower Semiconductor

• Tower:

  • Handles manufacturing, order intake, and shipping

• OpenLight:

  • Collects a small royalty on wafer shipments

This is a classic asset-light model:

• No inventory to carry

• No fabs to run

• 
  Design + IP as the primary profit source

2.7 Supply Chain Division of Labor and Management

2.7.1 Who Does What

Under the fabless model, roles are broadly divided as follows:

• Foundry:

  • Manufacturing capability, capacity planning

  • Process development, yield optimization

  • Wafer lead-time management

• Packaging and test (OSATs / Jabil, etc.):

  • PIC packaging (TOSA/ROSA, optical engines, CPO, etc.)

  • Testing and module assembly

• Fabless:

  • Architecture definition, design, and IP

  • Design services and customer support

  • Supply chain coordination and product roadmap planning

2.7.2 Capabilities a Fabless Company Must Have

Even without running a fab, a fabless company still needs deep supply chain knowledge:

• Knowing who can do which type of packaging and assembly

• Finding module makers willing to adopt its optical engines

• Integrating its PIC / engine into existing module and system architectures

3. SiPh Fabless vs. Tech-Giant Vertical Integration

3.1 The Vertical Integration Model in Brief

3.1.1 Scope of Vertical Integration

Vertical integration players typically control:

• The silicon photonics (SiPh) process

• Optical engines / transceivers

• Modules (transceivers, AOCs, DACs…)

• Systems (switches, servers, accelerators)

3.1.2 Pros and Cons of Vertical Integration

Pros:

• Product definition and specs are "self-consistent"

• Easier to optimize at the system level (power, latency, thermal)

• Scale and brand lock in Tier-1 customers

Cons:

• Extremely high CapEx / OpEx

• Less agile; won't commit resources to every new application

3.2 The Fabless "Asset-Light + High-Leverage" Model

3.2.1 Business Logic

The fabless strategy is to:

• Avoid heavy capital investment and focus on:

  • PIC / optical engine design

  • Architecture and IP

  • System-level reference designs

• Avoid head-on collisions with giants across the entire value chain

• Target:

  • Specific applications (LiDAR, Optical I/O, biomedical sensing…)

  • Specific technical advantages (higher integration, higher baud, lower power)

3.2.2 Representative Companies

Typical examples:

• OpenLight

• Xphor

• DustPhotonics

• NewPhotonics

• POET Technologies

3.3 Technical Innovation and Application Specialization

3.3.1 Targeting a Few Key Applications

Most fabless companies don't build a "full product line." Instead, they:

• Go deep on 1–2 key applications:

  • SiLC: FMCW LiDAR + the Eyeonic system

  • Ayar Labs: Optical I/O (chip-to-chip interconnect)

  • Lightmatter / Lightelligence: optical computing accelerators

3.3.2 New Materials and Advanced Technologies

Some companies focus instead on:

• New-material modulators:

  • TFLN, BTO, high-performance polymers

• Advanced modulation:

  • PAM6 / PAM8, high-baud-rate modulators

The goal is to achieve:

• Higher bandwidth

• Lower Vπ

• Better system performance

3.4 Ecosystems and Strategic Partnerships

3.4.1 What the Ecosystem Looks Like

One of a fabless company's key competitive strengths is ecosystem integration:

• Foundries: Tower, GF, TSMC, imec…

• Design services: Spark Photonics, VLC Photonics, Epiphany…

• Packaging / module / system partners: Jabil, ZKTel, FIT, Mentech, Luxshare, and others

3.4.2 Partnership Examples

Examples:

• OpenLight:

  • Foundry: Tower

  • Design services: Spark, VLC

  • Manufacturing / assembly: Jabil

• Xphor:

  • Strategic partnership with Tower

  • Supports PICs for 400G / 800G / 1.6T transceivers

This approach doesn't replace the giants — it embeds itself within the industry's value chain.

3.5 Niche Markets and Timing

3.5.1 Where Fabless Can Shine

Fabless companies are especially well-positioned in these scenarios:

• Explosive demand for AI / ML high-speed interconnect:

  • 800G / 1.6T pluggables, LPO, CPO, and Optical I/O all taking off at once

• Bottlenecks in the existing supply chain (e.g., EML / CW laser shortages):

  • New SiPh solutions get a chance to be designed in

• Emerging applications not yet settled:

  • LiDAR, biomedical sensing, electronic noses, etc.

4. How Fabless Companies Make Money and Survive

4.1 Selling PICs / Optical Engines: Product Revenue

4.1.1 The Revenue Path

The most intuitive revenue source: selling chips / optical engines.

The flow:

1. The fabless company designs and tapes out its own PIC / engine

2. The foundry manufactures the wafers

3. OSATs / partners complete packaging and test

4. 
   PICs / optical engines / sub-modules are sold to:

   • Optical transceiver module makers

   • System makers, in a few cases

4.1.2 Representative Companies

• DustPhotonics:

  • 400G / 800G transmitter optical sub-assemblies (TOSAs)

  • Has run pilot production of 200G/λ chips

  • Launched a single-chip 800G DR8 SiPh engine

• NewPhotonics:

  • Optical Equalizer PICs

  • Supports 1.6T linear-drive pluggable transceivers (LPO architecture)

• POET Technologies:

  • Its Optical Interposer platform delivers 800G / 1.6T optical engines

  • Customers include module makers such as ZKTel, FIT, and Luxshare

4.2 IP Licensing & Royalties

4.2.1 How the Model Works

The second path is a highly leveraged IP model:

1. The customer needs its own product but doesn't want to design a PIC from scratch

2. It buys from the fabless company:

   • IP licenses

   • GDS / reference designs

3. The customer uses that design and the PDK to place orders with the foundry

4. The fabless company collects a per-wafer / per-volume-tier royalty

4.2.2 Typical Cases

• OpenLight:

  • Provides design services and GDS

  • Customers order PICs from Tower

  • OpenLight never handles physical shipments — it only collects royalties on wafer shipments

• Celestial AI:

  • Strengthened its own platform by acquiring Rockley Photonics' SiPh IP

4.3 Design Services and Expert Consulting

4.3.1 Running Two Lines in Parallel

Many fabless companies run both:

• Their own product line (PICs / engines)

• A design services line (design service)

4.3.2 OpenLight's Service Model

OpenLight:

• Does reference design / co-design for customers

• Partners with Spark Photonics and VLC Photonics

• Provides layout / design services using its own PDK

The value of these design services lies in:

• Shortening customers' path from spec → tape-out → first silicon
  

• Building customer stickiness and path dependence on "our platform"

4.4 Cost Efficiency and Asset-Light Operations

4.4.1 Cost Structure Characteristics

The core fabless advantage is:

Leave the heavy capital to the foundry and invest only in people and IP.

Specifically:

• CapEx: no fabs, no large-scale packaging lines

• OpEx: spent mainly on R&D, product, FAEs, and application support

4.4.2 Sicoya's and POET's Cost Paths

• Sicoya:

  • Monolithic integration of Si + driver + TIA + photonics

  • Combined with wafer-level test → lower BOM and packaging costs, higher yield

• POET:

  • Uses its Optical Interposer as an optical interposer board

  • Replaces traditional manual precision alignment with wafer-level manufacturing and passive alignment

  • The company claims up to 75% cost savings (actual results depend on the application and adoption approach)

4.5 Fundraising and Strategic Investors

4.5.1 Cash Flow Reality

The reality for SiPh fabless companies:

• Early-stage cash flow is usually weak

• External funding is needed to carry the technology to maturity and early commercialization

4.5.2 Common Approaches and Representative Companies

Approach:

• Multiple rounds of VC / PE / strategic investment

• Funds are used for:

  • Multiple tape-outs and validation

  • Demo platforms / reference boards

  • POC / design-in projects with key customers

Familiar names:

• Quantifi Photonics

• iPronics

• Ayar Labs

• Lightmatter

• SiLC

• DustPhotonics

• Celestial AI

• Xscape Photonics, and others

Once the IP stabilizes and design wins appear, the later stage shifts toward:

• High-margin product revenue (PICs / engines)

• Long-tail royalty revenue

5. How Fabless Companies Convince Customers: "Can This Design Really Be Productized?"

5.1 PDK and Foundry Backing: Lowering Manufacturing Risk

5.1.1 The Customer's First Question

The customer's first question is always:

"Can the foundry actually build this design?"

5.1.2 How Fabless Companies Respond

The fabless playbook:

• Use the foundry's official SiPh PDK (Tower, GF, TSMC, AMF, imec…)

• Establish a formal partner relationship with the foundry

• Make it clear that:

  • The design is based on a "process platform already in volume production"

  • No new process needs to be developed for it

For the customer, this amounts to:

A guarantee that "manufacturing risk is under control and the design won't get stuck on the process side."

5.2 Providing Validated Reference Designs

5.2.1 Not Just Components, but a Complete Architecture

The second question is:

"I don't just need components — I need a system architecture that works."

Fabless companies provide:

• System-level reference designs:

  • System block diagrams

  • PIC top-level and channel mapping

  • Driver / TIA / CDR interface recommendations

  • Thermal design and packaging recommendations

• Development support:

  • Evaluation boards

  • Test reports (BER, eye diagrams, OSNR conditions)

  • App notes and design guidelines

5.2.2 Value to the Customer

For the customer, this means:

"There's a validated path to follow — I just need to customize along it."

5.3 Wafer-Level Test and Prototype Data: Let the Numbers Talk

5.3.1 Persuasion Through Data

The third question is:

"You say it's good — how good, exactly?"

Fabless companies typically provide:

• Wafer-level test statistics:

  • Performance distributions (data rate, IL, ER, RIN…)

  • Yield and corner behavior

• System-level demo results:

  • Transmission distance (e.g., 500 m SMF)

  • Supported baud / modulation:

    • 256 Gbaud OOK

    • 170 Gbaud PAM4

    • 150 Gbaud PAM6

    • 120 Gbaud PAM8

This data lets customers judge:

• The platform's "performance ceiling"

• The most sensible channel / modulation split for different applications (400G / 800G / 1.6T)

5.4 Supply Chain Integration: Proving It Can Scale

5.4.1 The Scale Question Customers Care About

The fourth question is:

"Even if the technology is good, will things break once volumes ramp?"

5.4.2 How Fabless Companies Answer

Fabless companies use the following to convince customers:

• Foundry capacity plans and process roadmaps

• A list of packaging and test partners

• Real partnerships with module / system customers

Examples:

• Xphor's strategic partnership with Tower → shows the supply chain can support high integration and cost efficiency.

• POET's partnerships with ZKTel, FIT, and Luxshare → prove its optical engines are already designed into real 800G / 1.6T market modules.

5.5 Closing With Cost and Scale Advantages

5.5.1 Economics That Add Up

The final question is:

"Once the math is done, is it still worth it?"

Fabless companies usually emphasize:

• Compared with full in-house development, adopting an existing platform and IP means:

  • Lower development risk

  • Faster time to market

• Through monolithic integration, wafer-level test, Optical Interposers, and similar technologies:

  • Lower BOM

  • Fewer assembly labor hours and workstations

  • Higher yield and repeatability

5.5.2 What It Means for System / Module Makers

For system / module makers, this means:

"I gain a mature technology option that won't swallow my whole value chain — I can still plug your PIC / optical engine into my existing supply chain."

6. Snapshots of Representative SiPh Fabless / Design Companies

6.1 OpenLight

6.1.1 Business Model

• A textbook example of the fabless + PDK + IP + design services model

• Business model:

  • Provides SiPh chip design services and reference architectures

  • Designs are manufactured by Tower Semiconductor

  • Delivered to customers after wafer-level testing

  • Provides GDS to customers and collects a small royalty on wafer shipments

6.1.2 Supply Chain and Positioning

• Supply chain:

  • Foundry: Tower

  • Design services: Spark Photonics, VLC Photonics

  • Manufacturing / assembly: Jabil and others

• Positioning:

  • Productizing a "designable, manufacturable SiPh platform" and turning it into an ecosystem

6.2 Xphor

6.2.1 Company Focus

• Based in Shanghai, focused on high-speed SiPh PICs and optical components

• Product focus:

  • PICs and solutions for 400G / 800G / 1.6T transceivers

6.2.2 Partnership With Tower

• Strategic partnership with Tower:

  • Supports a highly integrated, cost-effective SiPh supply chain

6.3 DustPhotonics

6.3.1 Product Positioning

• Develops transmitter optical sub-assemblies (TOSAs) for 400G / 800G

• Has completed pilot production of 200G/λ chips

• Launched the industry's first commercial single-chip 800G DR8 SiPh engine in 2023

6.3.2 Business Model Characteristics

• Leans toward a "product-driven fabless" model

• Supplies optical engines directly to module makers

6.4 NewPhotonics

6.4.1 Company Positioning

• A fabless semiconductor design, development, and production company

• Focused on:

  • PICs for data center AI hardware infrastructure

  • Optical Equalizer solutions

6.4.2 Technical Goals

• Supports:

  • 1.6T linear-drive pluggable transceivers (LPO)

  • Lower power consumption and better link performance

6.5 POET Technologies

6.5.1 The Optical Interposer Platform

• Built around its "Optical Interposer" platform:

  • Integrates electronic and photonic components on a single multi-chip module

  • Uses wafer-level semiconductor processes and packaging technologies

6.5.2 Market and Partners

• Partners with multiple module makers:

  • ZKTel, FIT (Foxconn Interconnect Technology), Luxshare, and others

• Has launched:

  • 800G / 1.6T optical engines for AI and data center transceiver modules

6.6 Other Key Design Companies and Startups

6.6.1 Representative Players

The SiPh ecosystem also includes a group of startups oriented toward "design / architecture / computing":

• Centera

• Ayar Labs (Optical I/O)

• Lightmatter (optical computing)

• Lightelligence

• Nubis Communications

• Xscape Photonics

6.6.2 Common Traits

Not all of these are classic fabless companies, but they share these traits:

• No large-scale manufacturing facilities

• Architecture design and IP as the primary source of value

• Deeply tied to specific applications (Optical I/O / optical computing / novel interconnect)

7. Conclusion: SiPh Fabless Is About Finding "the Right Position," Not "Beating the Giants"

7.1 Relative Position in the Value Chain

Lay out the entire silicon photonics value chain and you see:

• Vertically integrated players:

  • Use capital, technology, and product portfolios to capture most of the value chain

  • Their advantage is scale and end-to-end control

• Fabless players:

  • Cut into the value chain with design, IP, and platform capabilities

  • Fill the gaps the giants don't have time for — or don't want to do

7.2 The Real Question for SiPh Fabless

For SiPh fabless companies, the real question is not:

"How do I become the next Broadcom / Intel?"

but rather:

"How do I turn silicon photonics into a platform others are willing to adopt, can mass-produce, and can plug into the existing supply chain?"