OCP Global Summit 2026 | NVIDIA, Meta | Harish Krishnamoorthy, Parvez Shaikh | NVIDIA SDK + FBOSS: Production-Ready AI Network Fabrics

1. Why This Talk Matters: Meta Puts NVIDIA Switches Under FBOSS for the First Time

The talk ran only 16 minutes, with no new chip and no new optical component, yet it answered a question the industry rarely discusses in public: how long does it take a new switch ASIC to reach production on a hyperscaler's network?

Some background first. FBOSS (Facebook Open Switching System) is Meta's own network operating system. It is open source on GitHub, its roadmap and features are set entirely by Meta, and Meta's company-wide monitoring and remediation tooling is tied to it. Meta's switches have historically been built mostly on Broadcom silicon, while NVIDIA switches usually ship with NVIDIA's own Cumulus or the community SONiC. What is new here: NVIDIA is letting its silicon accept the customer's operating system and the customer's test rules.

In 2026 OCP APAC Summit | Ethernet Starts Eating Scale-Up we covered Broadcom using open Ethernet to challenge NVLink. This talk runs the other way: NVIDIA uses an open software interface to enter a Meta switch platform long led by Broadcom.

Chip specs set the ceiling; integration time decides when you actually get paid for it.

2. Breaking Down the Scale: 336 Switches per Zone, One Bad Release Hits the Whole Fabric

The speakers opened with a cluster diagram to show why software quality matters so much. The typical AI cluster on the slide uses GB300:

Tier	Count	Role
ToR / Leaf	144 per zone	Host-facing; ACL, PFC, ECN, MLAG / ECMP
Spine	192 per zone	Aggregates ToRs; adaptive routing and congestion control
Super Spine	288 per DC (8 planes x 36)	Core across pods and planes
GPU	48 racks, 3,456 per zone	72 per rack, 3 SUs per rack

▲ One zone of a typical AI cluster: 144 ToRs, 192 spines and 48 racks with 3,456 GB300 GPUs, plus 288 super spines across the DC (Image source: NVIDIA, Meta | 2026 OCP Global Summit presentation (p. 4))

By STT's math, the ToRs and spines in a single zone already add up to 336 switches, roughly one switch for every 10 GPUs. The line at the bottom of the slide is the premise of the whole talk: every layer must be programmed, tested and upgraded without stalling the fleet.

The speakers added two risks verbally: a single hardware failure propagates through the topology, and an under-tested software release gets pushed to every node, multiplying the blast radius. AI clusters make this worse: collectives such as All-Reduce and All-Gather wait for all data before the next step, so tail latency is the speed of the entire training job.

3. Breaking Down the Stack: SAI Is the Contract, the SDK Is the Dialect

NVIDIA brings three components:

• Spectrum-6 switch silicon: 102.4 Tb/s, 512 x 200G or 128 x 800G ports, in both pluggable and co-packaged optics (CPO) versions, with adaptive routing, congestion control, WJH (What Just Happened) and in-band telemetry.

• Spectrum SDK: the APIs that program and manage the ASIC. The speaker said it has been in production for more than 10 years with thousands of APIs, and one SDK spans Spectrum-1 through Spectrum-6.

• NVIDIA SAI: an OCP-compliant switch abstraction interface. The speaker said NVIDIA accounts for more than 20% of commits in the SAI community today.

▲ FBOSS expresses intent through OCP SAI, the NVIDIA SDK handles ASIC-specific behavior, and SAI is the standard API boundary (Image source: NVIDIA, Meta | 2026 OCP Global Summit presentation (p. 7))

Put simply: SAI is the contract between the NOS and the silicon, and each vendor's SDK is its own dialect. FBOSS uses SAI to say what it wants programmed on the ASIC, and NVIDIA translates that into Spectrum behavior. Meta put it more bluntly: FBOSS hardware tests exercise a series of SAI APIs, and those tests are Meta's requirements spec for any silicon vendor, whether Spectrum-4 or Spectrum-6.

That is also why the Spectrum-6 CPO version is worth watching. In Is NVIDIA's Shift From CPO to NPO Bad News for the Laser Supply Chain? we discussed NVIDIA's optics roadmap. As long as the SAI layer holds, a customer's choice between pluggable and CPO is decoupled from its choice of NOS.

4. Breaking Down the Schedule: Hardware Arrival Becomes a Milestone, Not the Starting Gun

The third component is SimX: a software-modeled Spectrum ASIC that appears as a PCI device inside a VM, so the NOS talks to it like real hardware. It supports forwarding tables, L2, L3 and ACL, but does not simulate QoS or L1 protocols.

▲ FBOSS connects to Spectrum through OCP SAI and the NVIDIA SDK; forwarding, L2/L3 and ACL can be validated first on SimX, while QoS, buffering and L1 still need real hardware (Image source: Simple Tech Trend original, data from NVIDIA, Meta 2026 OCP Global Summit presentation)

Combined with FBOSS's open-source tests, the joint schedule looks like this:

• Q-2 (first test run): 50% pass rate. Meta said most FBOSS features were already supported by the NVIDIA SDK; the main gaps were ISSU and a few others.

• About 6 weeks: needed features developed and tested on SimX or an NVIDIA alternate platform.

• Q0 (first hardware arrives): 90% pass rate within about a week.

• Q+2: 100% after platform-specific issues are fixed, ready for cluster qualification.

▲ The FBOSS test pass rate went from 50% two quarters before hardware arrival to 90% about one week after arrival, reaching 100% and entering cluster validation two quarters later (Image source: Simple Tech Trend original, data from NVIDIA, Meta 2026 OCP Global Summit presentation)

▲ The SDK, NOS, test and deployment tracks all start before the silicon exists, whereas the closed serial model cannot begin until the chip arrives (Image source: NVIDIA, Meta | 2026 OCP Global Summit presentation (p. 14))

Page 14 lays out the contrast: the closed, serial approach is SDK, then NOS, then test, then deploy, and nothing above SAI can start until the silicon lands. In the parallel model, what remains at hardware arrival is link bring-up, link validation and whatever the emulated environment cannot cover; small- and large-cluster testing that follows is still serial.

STT's read: if the serial model only starts climbing from 50% after hardware arrives, the whole curve shifts right by about two quarters. With AI racks delivered on a quarterly cadence, two quarters is enough to miss a batch of GPU rack deployments.

5. Co-Evolution: Four SDK Features FBOSS Forced Into Existence

Open tests also surface differences in how each side interprets the same feature, and surface them early. Meta gave several examples:

• ISSU (in-service software upgrade): FBOSS defined warm boot differently from the NVIDIA SDK's original implementation, so NVIDIA reworked it across several SDK drops to match FBOSS: upgrades without traffic impact, full resource usage, and state exported to a file and reloaded.

• Hardware drop reasons and counters: packet-drop visibility is a top priority in AI networks.

• Mirror on Drop (MoD): using the Telemetry Aggregation Cache (TAC) to inspect exactly which packet was dropped, plus a new SDK and device health-check feature.

• Cable length estimation via PTP: PFC needs buffer headroom to absorb in-flight packets between sending a pause and the sender actually stopping; longer cables need more headroom. Estimating cable length exposes links with misconfigured headroom.

None of these are spec-sheet selling points, yet they are problems production networks face every day. FBOSS's test suite turns Meta's operational experience into acceptance criteria every silicon vendor must pass.

6. Risks and Counterarguments

• The pass rate covers supported features: the speakers said supported features are typically at 100% when an SDK is released; the denominator is agreed by both sides, not all of FBOSS.

• The last 10% is the hardest 10%: SimX does not model QoS, buffers or L1, and PFC, ECN and congestion control are exactly what matters in an AI fabric. That work still waits for hardware, and it is where most of the two quarters goes.

• How much Spectrum-X differentiation carries over: NVIDIA's adaptive routing and congestion-control strengths usually pair end to end with its SuperNICs. The talk did not say which Spectrum-X-specific features are enabled under FBOSS.

• A single case: this is Meta's first NVIDIA switch program, and the numbers are self-reported. Whether the next ASIC goes faster is the real test of the method.

• A double-edged sword for NVIDIA: the easier the integration, the easier it is for Meta to switch silicon. NVIDIA is betting on getting in the door first, but gives up using its own NOS to lock in customers.

7. What It Means for Taiwan's Supply Chain

• The white-box bottleneck moves to platform bring-up. Once the SDK and NOS are ready before silicon arrives, the remaining serial work is link bring-up, link validation and hardware qualification, all of which sit with the system builder. Whoever does this fastest shortens the customer's time to deployment.

• One chassis, two chip options. In Meta's keynote at this year's OCP, its 102.4T switch platform runs two silicon paths, Broadcom TH6 and NVIDIA Spectrum-6, with Celestica and Accton as system builders. SAI lowers the cost of switching silicon, which means ODMs must maintain design and validation capability for both chips at once; we covered Celestica's switch momentum in Earnings Highlights: Celestica (CLS) | Q2 FY2026.

• Optical module demand does not depend on the NOS. Spectrum-6 offers 128 x 800G or 512 x 200G ports in pluggable and CPO versions. Opening the NOS does not change port counts, but it lets NVIDIA silicon into more non-NVIDIA networks, indirectly widening the addressable market for Spectrum-platform optics.

8. Conclusion

The point of this talk is not how fast Spectrum-6 is, but that NVIDIA and Meta turned integration time into a quantifiable, predictable process: open-source NOS tests as requirements, SAI as the contract, and SimX so software no longer waits for silicon. The result is a 90% pass rate a week after hardware arrives and cluster qualification in two quarters.

For Meta, this is the infrastructure behind a multi-vendor silicon strategy: if a new chip passes FBOSS tests, switching silicon no longer means rewriting software. For NVIDIA, it is openness traded for access. Over the next 12 months, watch three things: whether the next ASIC's pass-rate curve gets steeper, how far Spectrum-X-specific features are exposed through SAI, and Spectrum-6's share of deployment on Meta's 102.4T platform.

When a test suite can stand in for chip evaluation, the switch market's moat shifts from software lock-in back to the silicon itself and system lead times.

This article is for technology and industry trend analysis only and does not constitute investment advice.