Is NVIDIA’s Shift from CPO to NPO Bad News for the Laser Supply Chain? Four Heated Debates, Explained
A hard-hitting CPO/NPO commentary has been circulating widely in the industry lately, and it has ignited four debates at once. Rather than copying its conclusions, we break each debate apart, keeping the technical facts worth keeping and stripping out the emotion and position-driven bias.
The market instinctively read “NVIDIA is not adopting TSMC’s CPO” as bearish for the laser supply chain, but the reality is likely the opposite — to make up for lower channel density, NPO must push per-lane data rates higher, which drives laser specs into a harder, more expensive range that fewer vendors can deliver.
The easiest misreading to make: both COUPE CPO (Plan-A) and Tower SiPho NPO (Plan-B) discussed in the piece are next-generation routes still being trialed, not the architecture used in the soon-to-ship Quantum/Spectrum generation. NVIDIA is indeed experimenting with 32–64G NRZ, but it is not the mainstream solution headed for near-term volume production.
There is no magic to high-power UHP CW lasers. The industry has only two paths: lengthen the cavity (make the laser bigger) or add an amplifier (MOPA). The higher the power, the stricter the reliability qualification bar.
The deciding factor for VCSEL CPO lies in packaging, integrated drivers and yield, not in the VCSEL device itself.
A handy diagnostic: EML-based and SiPh-based modules should not carry the same gross margin. If they converge, it usually signals rising upstream laser prices or yield problems on the production line.
Before settling on any view of these order-shift rumors, it is worth waiting for what TSMC says about COUPE and advanced packaging on its 7/16 earnings call.
1. Why Now: One Commentary Ignites Four CPO/NPO Debates
This wave of discussion traces back to an opinionated industry commentary (Irrational Analysis’s “July NPO/CPO Update”), which argues that most people have misread NVIDIA’s optical roadmap. Its technical framework has substance, but the author holds large positions in related stocks and openly states long/short views, so our rule is simple: keep the analytical framework, set aside the emotion aimed at specific people and positions.
Before getting into the four debates, one key point needs to be established, because everything that follows rests on it:
Every architecture discussed here is an experimental option for NVIDIA’s next generation that is still converging — not the product generation shipping right now.
Much of the panic actually comes from timeline confusion — equating “NVIDIA’s CPO vs. NPO roadmap debate” with switch products that have already been announced and are about to ramp. Once “trade-offs among next-gen options” is misread as “trouble in a shipping product line,” the whole signal gets read backwards. This is the first thing this article aims to correct.
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2. The Truth Behind NVIDIA’s Order Shift: COUPE, Tower, and Why “Moving to NPO Is Bullish for Lasers”
Start with the facts. Co-Packaged Optics (CPO) and Near-Packaged Optics (NPO) are technically similar; NPO simply moves the optical engine one step back from “co-packaged with the ASIC” to “next to the package,” at the cost of lower channel density and power efficiency. The order-shift path the author describes is:
Plan-A: slow-and-wide CPO on TSMC’s COUPE platform, roughly 50–64G NRZ with 8-wavelength DWDM.
Plan-B: NPO on Tower Semiconductor’s silicon photonics platform, 200/400G PAM4 with 16-wavelength DWDM.
He attributes the shift to TSMC stalling on high-density 2D grating couplers and SiN PDK progress. What is most worth remembering about this chain of reasoning is its counterintuitive conclusion: because NPO has longer electrical channels and suffers from reflections and bump capacitance, its channel density is inherently lower, so maintaining bandwidth requires higher per-lane rates. Higher rates raise SNR requirements, which in turn tighten laser specs for relative intensity noise (RIN) and linewidth — and linewidth directly kills the extinction ratio of ring modulators. The result: after switching to NPO, laser specs go up rather than down, pushing ASPs and content higher, not lower.
Two corrections from STT. First, hold off on the characterization that “TSMC botched the grating coupler.” For now it is one analyst’s account, with no official confirmation from TSMC or NVIDIA, and the claim conveniently supports the author’s position, so the motive should be flagged. TSMC’s Q2 earnings call is on 7/16 (two days after this article is published), and COUPE and advanced packaging progress are exactly the hot topics analysts will press on. Any response — or evasion — from management will be a harder signal. Until then, treat “botched” as a hypothesis, not a fact. We cover the COUPE ramp timeline and the winners and losers in detail in The Year CPO Goes Commercial — TSMC COUPE Volume Production and the 200G EML Bottleneck.
Second, back to the foundation: both Plan-A and Plan-B are next-generation routes still being trialed. We break down the technical context of NVIDIA’s slow-and-wide DWDM laser array in detail in Light Shouldn’t Be Forced Into Electrons and Back: Why NVIDIA’s DWDM Laser Array Rewrites the Economics of Optical Interconnect (ECTC 2026) and NVIDIA Lays Out the Full “Optics into the Interposer” Stack: From ECOC Concept to ISSCC Production; for how Meta/Broadcom/AMD define the “micro-ring DWDM + external laser” scale-up line-side spec, see OCI 200G Line-Side Spec: Single-Fiber Bidirectional, Micro-Ring DWDM and the External-Laser Scale-Up Bet. NVIDIA is indeed experimenting with 32–64G NRZ, but it is not the mainstream solution slated for near-term volume production — which is also why “not using TSMC CPO” should not be read as laser demand disappearing. So even if the order shift is real, it affects architecture choices for future generations, not a yield crisis in currently shipping products — and the investment and supply-chain implications of those two things are completely different.
3. High-Power UHP Lasers: Longer Cavity vs. Amplifier, and Why the Qualification Bar Is Higher
This section is about technology only; we do not rank anyone. To push up power on ultra-high-power (UHP) continuous-wave lasers, the industry really has just two paths:
Lengthen the cavity: make a single laser bigger. The structure is simple, but noise becomes harder to suppress as power rises.
MOPA (Main-Oscillator Power-Amplifier): start with a clean low-power laser (e.g., 100mW) and boost the power with an amplifier stage. The upside is that output noise is set by the small front-end laser and is easier to manage; the cost is a larger monolithic indium phosphide (InP) chip, harder yields, and a stability risk of mode-hops (flickering instability) between the DFB and the amplifier.
The real takeaway is “qualification,” not “rankings.” The difficulty of UHP lasers has never been just how many mW they hit on paper, but whether they can maintain low noise and high wall-plug efficiency (WPE) at that power, with long-term reliability. Power and efficiency are also highly temperature-dependent — the same laser can produce very different numbers at different temperature set points — so any cross-vendor or cross-product comparison must first align test conditions (especially thermal set points), or it is apples to oranges. That is why the higher the power, the stricter the qualification and reliability process: these lasers are inherently harder to compare fairly than ordinary lasers. As for where each vendor’s actual numbers land, most are undisclosed or under NDA, and STT will not speculate.
We explain more fully why this upstream laser is the deepest bottleneck in the entire AI optical interconnect chain in Lumentum Fireside Chat: From Boom-Bust to Structural Multi-Year Growth — InP Is the Real Bottleneck.
4. VCSEL CPO: Ashkan Is Betting on Packaging, Not micro-LED
Here we agree with the author’s read, and we can take it one level higher. When the market saw “an NVIDIA optics heavyweight who publicly opposed micro-LED (Ashkan Seyedi) jump to an LED-focused company,” it instinctively concluded he had switched to backing micro-LED. That is a misreading.
Technically, micro-LED and VCSEL-based CPO/NPO are similar in concept; the key difference is the bandwidth ceiling: LEDs are stuck at 2–5GHz (10GHz at most), while vertical-cavity surface-emitting lasers (VCSELs) easily reach 50–70GHz. Aggregating bandwidth from huge numbers of low-bandwidth lanes brings severe EMI and crosstalk, requiring very heavy forward error correction (FEC), which makes scaling impractical.
But the insight truly worth remembering is this:
The outcome of VCSEL CPO depends not on the VCSEL device itself, but on packaging, integrated drivers, manufacturing and yield.
That is because 32–64G NRZ VCSELs are already mature products that many vendors can make — from Intel Takes VCSEL CPO Below 1 pJ/b: A Full Circuit Breakdown from 4×50G NRZ to 108G PAM4 to Furukawa Fits 1060nm Single-Mode VCSEL CPO into a Standard MT Ferrule — and Runs It 2 km, it is clear that VCSEL-based CPO/NPO is no longer a lab concept — the device is no longer the scarce part. This also gives Ashkan’s move a logical explanation: what he wants is not that company’s LEDs, but the packaging and integration know-how it built up making LEDs — to integrate “mediocre but good enough” VCSELs into production-grade CPO/NPO that can go head-to-head with silicon photonics DWDM ring-modulator solutions.
Zooming out to the bigger picture. CPO/NPO is not a zero-sum race with a single winning route, but a market large enough for multiple technologies to coexist. The VCSEL route’s strength is that it is a mature product already proven at scale in data centers, not a lab-stage concept, and several major vendors continue to push it forward. For those tracking this route, keep your eyes on integration and yield, not just VCSEL specs. We give a harder technical breakdown of this “the battle is won in packaging, not optics” theme in CPO Is Won in Packaging, Not Optics — John Lau on Every PIC/EIC Heterogeneous Integration Approach.
5. The Gross Margin Litmus Test: EML and SiPh Modules Shouldn’t Share the Same Margin
On the last debate, we endorse the analytical tool behind it, but we do not comment on any specific company.
The whole point of silicon photonics (SiPh) transceivers is to trade some modulation performance and reduce InP usage in exchange for lower cost. Historically, at every speed transition (100G→400G→800G→1.6T), electro-absorption modulated laser (EML) solutions arrived first (best performance), and SiPh solutions followed 6–18 months later as “good enough but clearly cheaper.” What is different this cycle: the InP shortage is so severe that SiPh captured the majority share early.
Against this backdrop, there is a very useful diagnostic framework:
Under normal conditions, EML-based and SiPh-based transceivers differ in BOM cost and performance positioning, so their margin structures should not match. When the two converge, something has gone wrong in between.
The reasonable lines of inquiry fall into two categories — whether high-end upstream lasers (such as EMLs) have risen in price due to tight supply, eating into module-level costs; or whether active alignment yields on SiPh lines are low, eroding the cost advantage that “should be cheaper.” This is a litmus test that can be applied to any module maker.
But STT’s position is: present the framework, name no names, and draw no conclusions about any company’s financials. Which company, whether there is a real anomaly, and what causes it all involve undisclosed yield and pricing data, as well as judgments about individual companies — that is not what we do. When drawing on the original commentary, we also suggest separating the “analytical method” from the “emotion aimed at specific executives” — keep the former, and there is no need to take the latter wholesale. We lay out the depth of the transceiver market over the next decade in ZR Is the Meat, Coherent Lite Is the Bone: The Next Decade of the Optical Transceiver Market.
6. Conclusion
These four debates may seem independent, but they can be summed up in one sentence: Don’t rush to read the signal backwards, and don’t mix up the timeline. NVIDIA’s move from CPO to NPO is more likely a spec upgrade for the laser supply chain than a disappearance of demand; competition in UHP lasers is about qualification and reliability, not paper mW; the competitiveness of VCSEL CPO has long since shifted to packaging and yield; and module gross margin is a litmus test you can use yourself.
One concrete next step for readers: watch what TSMC says about COUPE and advanced packaging progress on its 7/16 earnings call. It will be the nearest official checkpoint for the “order-shift rumor” and the “grating coupler stall” claim — until then, treat these characterizations as hypotheses, not conclusions.
This article is for technology and industry trend analysis only and does not constitute investment advice. The third-party commentary cited (Irrational Analysis, “July NPO/CPO Update”) reflects that author’s personal views, and the author has disclosed holding related positions; readers should judge for themselves.
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