Bandwidth is per-lane speed times lane count. Push speed and you hit the SerDes energy floor; push lane count and you hit fiber and connector cost. The new fact this year: the second wall arrived first.

Scale-up optical interconnect looks like a seven-way melee, but there are really only two strategies, Fast-and-Narrow and Slow-and-Wide, each hitting a symmetric wall. Learn the yardstick first, then see how the seven approaches layer and coexist.

Tackling both the power and capacity bottlenecks of GPU scale-up, Lumentum taps the mature 3D sensing and LiDAR supply chain to redefine high-density interconnect with 1060nm VCSEL arrays.

Can a VCSEL go 2 km? At OFC 2026, Furukawa Electric showed an ultra-compact 800G CPO transceiver that uses 1060-nm single-mode VCSELs to hit 4.1 pJ/bit over standard single-mode fiber, challenging silicon photonics in AI interconnects.

Silicon photonics gets the spotlight, but Intel's 0.9 pJ/b 108G PAM4 link shows VCSELs remain an underrated low-power path for short-reach CPO. We walk through this CICC 2026 paper section by section, figure by figure, and identify the last three miles VCSEL CPO must cover to reach volume: equalization, packaging and thermals.

850 nm is being pushed off the AI scale-up shortlist not because of speed but because of junction temperature. Moving to 1060 nm isn't swapping a die — fiber, PD, packaging and standards all have to change together.

An 850nm VCSEL that passed a 20-year, 100G production spec failed after 1,600 hours in scale-up rack thermal conditions, while a 1060nm device under identical conditions ran 5,000 hours unscathed. At ECOC 2026, Lumentum used one chart to show the VCSEL bottleneck was never speed—it is heat.

Chasing every option would force optical module makers to develop more than 50 SKUs. And at 1,024 lanes, OSFP beachfront density is just 0.07 T/mm versus a 0.3 T/mm target — a gap of over 4x. Huawei argues NPO means redesigning the whole switch, from sockets and thermals to PI/SI.

On the same day and at the same wavelength, Lumentum said OM3 and OM4 can't be used at 1060nm, while Berxel ran 100 meters of OM3. The number that really matters from this talk is ±22 µm: it downgrades optical packaging from precision alignment to simply placing the part.

In a session dominated by silicon photonics, NVIDIA argued that VCSELs already deliver ≤1 pJ/bit. What holds them back is fiber: 2,304 strands per GPU, 60,000 per data hall, and fiber cost is why NVIDIA paused its own slow-and-wide project.

VCSELs have long been dismissed as 100-meter light sources. Furukawa's 1060nm single-mode VCSEL CPO reaches 2 km at 4.1 pJ/bit using a standard MT ferrule and off-the-shelf fiber. The real breakthrough is not lower power, but finally plugging into existing fiber infrastructure.

"OSFP 800G SR8" is not a part number — it is five axes stacked together. Learn form factor, data rate, reach, electrical I/O and light source, and you can read any optical module spec and see why two 800G modules can differ 3x in price. Interactive lookup tool included.

VCSELs evolve again. At OFC 2026, Berxel Photonics revealed a back-emitting VCSEL with an integrated metalens, overcoming thermal and alignment challenges in a 1.6 Tbps array demo and sketching a new blueprint for short-reach AI interconnect.

Broadcom's latest 200G VCSEL paper reports over 35 GHz bandwidth and about 1 pJ/bit efficiency, paired with a new NPO architecture aimed at replacing copper in AI scale-up networks. We walk through all 12 figures.

At OFC 2026, WIN Semiconductors showed what it takes to be the world's leading III-V foundry: tight control of trench etch and oxide aperture underpins a VCSEL supply chain of millions of wafers, while it builds out advanced processes for CPO and autonomous driving.

Fourteen speakers argued for three hours without ever defining "slow" — the same OCI spec got four different answers under six definitions. Reported pJ/bit ranged from 0.369 to 20, and most of that 54x gap is measurement boundary. The real takeaway isn't who won: every timeline converges on 2027–2028.

The market read NVIDIA “not using TSMC CPO” as bearish for lasers — the opposite may be true. We untangle four heated CPO/NPO debates and warn against mistaking next-gen experimental architectures for trouble in shipping product lines. TSMC’s 7/16 earnings call is the next key checkpoint.