As copper interconnects hit their physical limits, NPO is emerging as the practical lifeline for AI compute clusters. Tencent and Alibaba plan to start 3.2T NPO deployment by late 2026, while Huawei proposes a 7.2T spec aligned with GPU roadmaps.

Scale-up optical interconnect looks like a seven-way melee, but there are really only two strategies, Fast-and-Narrow and Slow-and-Wide, each hitting a symmetric wall. Learn the yardstick first, then see how the seven approaches layer and coexist.

Tower put a $1.3B 2027 SiPho contract on the table, and that is only the committed portion; management hinted 2028 will be "substantially larger." The question is no longer whether SiPho takes off, but whether 300mm capacity can keep up, which is the real reason Tower took full ownership of Fab 7 in Japan.

What is the right way to cool a 51.2T NPO switch? A Celestica ITherm 2023 paper answers: cold-plate liquid cooling at 2 LPM leaves margin for both the ASIC and the OEs. The real bottleneck is not the 835W ASIC but the 16 optical engines capped at a 70°C case temperature.

CPO light sources aren't limited to external ELSFP at 400 mW. TeraHop saves 3 dB by building the laser into NPO, and Lumentum's own specs put NPO at 21–23 dBm vs. 25–26 dBm for CPO. A 3–4 dB lower bar puts Taiwan's CW laser chain right at the door of this window.

The external laser source has gone from "one part inside a module" to a formal product category with specs, interoperability requirements and multiple competitors. Of the seven spec fields laid out at ECOC, power is just one; the real ticket is spec completeness and packaging throughput.

NPO is being treated as a long-term architecture not out of technical preference, but because of supply constraints. Separable architectures create component markets - and whether NPO or CPO wins, the laser stays outside the package.

With a 29.9% gross margin and 19.7% net margin, Tower proved this quarter that silicon photonics has gone from narrative to the engine reshaping its profit structure. Record revenue, a SiPh annualized run rate heading for $1B, and dual-track 300mm expansion in Japan lifting the 2028 model to a 33% net margin. Here are the three metrics to track next quarter.

After 1.6T there is no single winner: every reach has its own lowest-power answer. Two companies on this panel gave the same number — the reverse gearbox feeding slow-and-wide optics costs 4 pJ/bit, more than the optics themselves. And Oracle's field data pulled the spotlight back to the 4,096 fiber contacts on a front panel.

Outside the silicon photonics mainstream, Mitsubishi Electric bets on III-V EMLs flip-chipped onto a glass interposer: the prototype already reaches 89 GHz, 106.25 Gbaud PAM4, and 2.37 dB TDECQ. As each lane heads toward 400 Gbps, can this high-speed path clear the hurdles of arraying and cost?

MACOM posted a record quarter with all three end markets growing and book-to-bill at an all-time-high 1.6. It sells chips, not modules, yet sits inside every optical interconnect architecture. Here are the hard numbers and management's real signals in three minutes.

Chasing every option would force optical module makers to develop more than 50 SKUs. And at 1,024 lanes, OSFP beachfront density is just 0.07 T/mm versus a 0.3 T/mm target — a gap of over 4x. Huawei argues NPO means redesigning the whole switch, from sockets and thermals to PI/SI.

From 15 years at 10G to 4 years at 1.6T, the time for a data-rate generation to reach 10 million units has been cut again and again. At ECOC 2026, Lumentum laid out the numbers: half of module power goes to the DSP, only 24% of that DSP computes — and the real volume bottleneck is plugging in fibers.

Scoring three architectures on the same criteria, Ciena shows single-vendor CPO going from second-best to best on technology, but from efficient to at-risk on supply chain, because the ASIC and interconnect are sold as one unit. Open CPX's answer is not a better component but a socket that optics and copper share, and a spec written in under six months.

The value of optical interconnect isn't saving power; it's unlocking the physical boundary of the pod. Astera Labs laid out the scale-up fabric bottleneck plainly at OCP APAC, and its candid Q&A reservation on CPO serviceability is where Taiwan's supply chain has a real opening.

GF raised its full-year CID growth target from the high 30s to 50–60% and now expects silicon photonics revenue to more than double, while non-IFRS gross margin touched 30% a year ahead of plan. With incremental revenue dropping almost entirely to gross profit, the market has to reprice GF's content, not its capacity.

On the same day and at the same wavelength, Lumentum said OM3 and OM4 can't be used at 1060nm, while Berxel ran 100 meters of OM3. The number that really matters from this talk is ±22 µm: it downgrades optical packaging from precision alignment to simply placing the part.

At ECOC 2026, Huawei did something the industry rarely does in public: score NPO and CPO dimension by dimension. NPO won four, CPO two. But the real signal is the ranking, not the score - with supernodes heading to 4,096 accelerators in 2027, "can it be swapped when it fails" is put ahead of "how many pJ per bit it saves" for the first time.

OCS has left the lab, but today it is less a market than a customer list with one name on it. Cignal AI's ECOC 2026 numbers: ~95% of OCS ports go into Google's TPU network, and whether GPU scale-up becomes the next killer app depends on CPO going multi-wavelength — an 8x port-count gap that will split the supply chain.

At ECOC 2026, Coherent skipped the CPO sales pitch and brought a working machine: a 6.4T NPO with its own ELSFP at 4.7 pJ/bit — laser included. LightCounting puts the crossover at 2031. The CPO debate is over; what remains is a fight over the slope.