OCP Global Summit 2026 | Molex | Bill Wilson | Enabling an Open Near-Package Ecosystem for AI Scale-Up

1. Why a connector company is talking about NPO

Molex gave a separate 224G AEC talk at the same OCP summit, covering 1 to 6 m active electrical cables (AEC) from inside the rack to the neighboring rack; this session moves the camera inside the box. Bill Wilson's first slide title is the conclusion: the copper-optics boundary is moving from the front panel to inside the box.

Copper-versus-optics used to be decided at the front panel, on reach, cost, power and performance. As accelerator fabrics grow in size and bandwidth, the boundary moves toward the ASIC: pluggables at one end, NPO in the middle, CPO at the other. Wilson said explicitly he would not cover CPO and focused on NPO: the optical engine sits close enough to the ASIC to shorten the high-speed electrical channel, while keeping a pluggable, serviceable interface in a lower-risk area than on-package.

We discussed this argument in NPO Is Not a Stepping Stone to CPO. What Molex adds is the connector maker's view: whether NPO is serviceable and multi-sourced is ultimately decided by the interface layer between the host board and the module.

The optical engine sets the pJ/bit; the connector decides who gets to supply it.

2. Breaking down the requirements: passive copper is still the benchmark

Molex cites the framework of the OCP SROI (Short-Reach Optical Interconnect) workstream: scale-up optical interconnect must meet six requirements at once, namely power, reliability, density/radix, cost, performance and interoperability, and it must be evaluated at the system level against the cost and performance of passive copper.

Under those six requirements, Wilson gave system designers three levers:

• Copper/optics balance: passive copper, active/retimed, linear optics

• Optical placement: front panel, near package, on package

• System integration: discrete, modular, tight integration

The implication: the 224G and 448G generations will not have one answer but many combinations of three levers. With that many combinations, whether interfaces can be shared becomes the real challenge, and that is the starting point for every product in the second half of the talk.

3. Breaking down Gemini Mezz: turning the "custom protocol" column into a standard

Gemini Mezz is a 224G mezzanine connector Molex introduced within the last year. Every differential pair is individually shielded, and it keeps the Mirror Mezz family's genderless (self-mating) design, 5 mm stack height and BGA termination, with a symmetric 3 x 3 mm pair pitch that eases board breakout in both north-south and east-west directions.

The real news is the 8 x 13 version Molex expedited through tooling, and the pin map proposed with it:

Use	Differential pairs	Content
6.4T payload	64	32 Tx + 32 Rx
7.2T extension	8	4 Tx + 4 Rx
Control	16	32 single-ended pins
Power	12	12V, 3V, 1.8V, 36 A total

▲ Gemini Mezz 8 × 13 pin map: 100 differential pairs allocated to 6.4T payload, 7.2T expansion, control and 36 A power delivery (Image source: Molex | 2026 OCP Global Summit presentation)

STT calculation: at 200G per lane, 32 pairs is exactly 6.4T and 36 pairs is 7.2T. Of the 100 pairs, a 6.4T module uses 64% and a 7.2T module uses 72%, leaving 28% for control and power. 6.4T and 7.2T module classes share the same footprint, which is the problem Gemini sets out to solve; Open CPX Rev 1.0, presented by Ciena in a separate talk at the same summit, likewise defines 6.4T and 7.2T (32 or 36 lanes of 200G) classes.

▲ Allocation of Gemini Mezz's 100 differential pairs: 64 + 8 + 16 + 12, with one footprint covering both 6.4T and 7.2T (Image source: Simple Tech Trend original; data from Molex, 2026 OCP Global Summit presentation)

Why call it a standards proposal? Slides from a separate Genuine Optics talk at the same summit sort 6.4T NPO connectors into three columns: LGA under ODCC UPO (which Genuine said orally is more common in Asia, especially China), CPX T2 on the US/European path, and a 26.6 x 41.6 mm Mezz labeled "custom protocol" (with MME and Gemini as the examples). On stage, Wilson said Molex "potentially" has more details on Gemini standardization and asked the audience to watch for updates. Molex wants its own pin map to become the common language of NPO.

4. Breaking down CuOperate: deferring the copper-or-optics decision

CuOperate is the newest and least publicized product in the talk; Wilson said only a few demo units exist so far. The problem it addresses: in traditional designs, NPO modules and NPC cables each have their own footprint, so once the board layout is drawn, you are forced to pick copper or optics too early.

CuOperate pulls out what the host board can share: the high-speed land pattern, differential-pair arrangement, grounding structure, board escape strategy and mechanical datum. Two different receptacles then mount on top:

• CuOperate Mezz: takes an NPO optical module, with power, sideband contacts and module guidance, and no positive retention required

• CuOperate NPC: twinax cable exits directly, with right-angle exit, screw retention and cable strain management

▲ CuOperate shared footprints surrounding the ASIC: 16 sites × 64 differential pairs, mixing NPO modules and NPC cables for 102.4 Tb/s unidirectional (Image source: Molex | 2026 OCP Global Summit presentation)

The slide's example layout has 16 sites of 64 differential pairs each (the slide text says "16 NPX footprints"; NPX appears to be a typo or internal shorthand for NPO/NPC, and we read it as 16 CuOperate sites based on the drawing's 4 NPO modules, 4 NPC cables and 4 footprints each on the top and bottom edges), for 1,024 pairs in total (512 Tx + 512 Rx), or 102.4 Tb/s per direction at 200G per lane. That lane count matches the scale discussed in ECOC 2026: A 1,024-Lane Switch Stuck at 0.07 T/mm; the difference is that Molex lets the same ring of 1,024 lanes run partly on optics and partly on copper.

Note that each CuOperate site in the example counts only 64 pairs, i.e. 6.4T class, without Gemini's 7.2T extension; the slides do not say whether the two share a pin map.

5. Mirror Mezz Enhanced and Si-Fly HD: one hand on the proven path, one on the MSA

The other two product lines are two different hedges:

• Mirror Mezz Enhanced (MME): 224G, 5 mm stack, genderless. The Mirror Mezz family is written into the OCP OAI/OAM v1.0 and v1.5 specifications and has shipped in volume for several years. The 6.4T NPO Genuine showed at the same summit (per its slides) uses MME, making this the low-risk path that can ship today.

• Si-Fly HD: a Molex-licensed interoperable connector system, labeled 8 x 12, CPX Type 2 on the slide. Molex is a founding member of the Open CPX MSA, which secures multi-vendor interoperability through second-sourcing agreements and tooling commitments. For the Open CPX ecosystem background, see ECOC 2026: Ciena Turns the 6.4T Optical Engine Back into a Shelf Part with Open CPX.

▲ The three module-side interfaces for 6.4T NPO (LGA, CPX Type 2 and Mezz) and Molex's matching products, with CuOperate sharing the footprint on the host-board side (Image source: Simple Tech Trend original; data from Molex and Genuine Optics, 2026 OCP Global Summit presentations)

Putting the three interfaces side by side (STT calculation): Gemini at 26.6 x 41.6 mm is about 1,107 mm², almost the same area as the larger CPX T2 type in Genuine's table at 22 x 50 mm (1,100 mm²); per Ciena, the CPX Type 2 socket is a single pin field, and Gemini likewise puts high-speed signals, control and power into one footprint. With area at parity, the winner is whoever first wins backing from standards bodies and large customers.

▲ Molex's four near-package interconnect product lines: Mirror Mezz Enhanced, Gemini Mezz, CuOperate and Si-Fly HD (Image source: Molex | 2026 OCP Global Summit presentation)

6. Risks and counterarguments

• Betting on everything is betting on nothing. Molex's own closing line is that "no single interconnect architecture will satisfy every AI scale-up application." For a connector company that is a sensible hedge, but for system makers every extra interface means another round of qualification and inventory.

• Gemini standardization is only a preview. The pin map is a "proposal", and Molex did not say which body it will go to or when. If OIF or Open CPX picks a different pin map, Gemini stays inside Molex's own ecosystem.

• The 36 A power split is not disclosed. The pin map carries 12V, 3V and 1.8V rails, but per-rail current and the module power ceiling were not given.

• CuOperate has no channel data yet. Sharing land patterns between copper and optics means both uses may compromise on signal integrity, and the talk gave no insertion-loss or crosstalk numbers.

• NPC reach is not quantified. The slides only say twinax extends copper beyond practical PCB routing distance, with no meters given at 224G.

7. What it means for Taiwan's supply chain

• Connector makers face a pin-map fight, not just a capacity question. In the Q&A of Ciena's Open CPX talk at the same summit, the socket suppliers named orally were Samtec and Molex (he also said he might be missing some); for LOTES and FIT, which appear among the Open CPX member logos on Ciena's slides, the MSA's second-sourcing mechanism is the formal entry point, but Molex has not disclosed who licenses Si-Fly HD.

• Switch and server board makers will see design timelines pulled forward. Molex's call to action explicitly asks for channel simulation and cost studies "before it's frozen." If CuOperate is adopted, ODMs could build copper and optical SKUs on the same board; Open CPX members Accton and Alpha Networks sit squarely in front of this problem.

• NPC is a new item for cable assembly. Twinax running from beside the ASIC straight to the panel is another kind of near-package copper assembly; Taiwanese cable assemblers such as BizLink are on the Open CPX member list, and it is worth tracking when near-package copper shows up in their product lines.

8. Summary

This talk had no new pJ/bit figure and no optical engine, but it highlights an often-overlooked fact about NPO: the module is pluggable, the footprint on the host board is not. Molex uses Gemini to compete for the standard pin map, CuOperate to let customers defer the copper-or-optics decision, and MME plus Si-Fly HD to cover both the proven path and the MSA.

On timing, the Gemini 8 x 13 already has demo units and Open CPX Rev 1.0 is published; per Genuine's slides, OIF 12.8T NPO (covering 6.4T and 7.2T) is expected to set its baseline in November 2026 and publish in August 2027. Three things to watch over the next 12 months: whether the Gemini pin map enters OIF or Open CPX documents, the first public CuOperate design-in, and measured reach data for 224G NPC.

The NPO interface war is not fought on the optical side but on those thousands of pads on the host board; whoever gets its pin map written into the spec first owns the default slot on the next generation of scale-up boards.

This article is for technology and industry trend analysis only and does not constitute investment advice.