ZR is the meat, Coherent Lite is the bone. 2026 is the year ZR generates cash; 2028 is when Coherent Lite truly ramps. Three signals could reverse everything: whether Amazon commits, how fast LPO/CPO win sockets, and production-grade demos at OFC 2027. Taiwan's real opportunity lies in upstream components, not the DSP.

AI compute is growing 2.5X a year and electrical switching is hitting its limits. An OFC 2026 workshop showed how optical circuit switching (OCS), with its low latency and low power, is becoming a core technology for NVIDIA and the hyperscalers building next-generation AI supercomputers.

Scale-up optical interconnect looks like a seven-way melee, but there are really only two strategies, Fast-and-Narrow and Slow-and-Wide, each hitting a symmetric wall. Learn the yardstick first, then see how the seven approaches layer and coexist.

CPO is a bet on more than a dozen paths: the Big Four enter via scale-up, switch silicon, custom engines and optical I/O, while challengers stake out optical I/O chiplets, photonic interposers and microLEDs. But they share one supply chain — great specs don't guarantee a path to volume. This is a CPO scorecard.

As AI training outgrows a single site, Scale Across is the new normal. How Meta defines the next generation of interconnect, why Google says "fiber is the new wavelength," and the strategy behind Lumen's push to add 41 million fiber miles.

Light leaks a little at every interface, and coupling is where CPO's optical losses concentrate, an invisible ceiling on yield and serviceability. Doubling V-groove density, edge vs. grating coupling, passive vs. active alignment: this unglamorous layer is where volume-production gaps open up.

NVIDIA proposes a symmetrical, wavelength-agnostic bidirectional silicon photonics link that uses polarization multiplexing to break CPO's port-count and cost bottlenecks. Error-free 32 Gbps bidirectional operation makes "colorless" optics a reality and paves the way for scaling AI cluster networks.

Silicon photonics' original sin is that it can't emit light. Lasers hate heat, yet CPO asks them to sit next to a hot chip — making the light source the reliability ceiling, where one failed laser can cost an entire optical engine. External vs integrated sources and four light-source types each bet on a different future.

CPO isn't stalled because the components can't be built, but because packaging has switched to an entirely new method. Once the optical engine moves onto the ASIC substrate, photonic packaging must become semiconductor-grade. Whoever standardizes it for foundries and OSATs controls the CPO timeline.

Tackling both the power and capacity bottlenecks of GPU scale-up, Lumentum taps the mature 3D sensing and LiDAR supply chain to redefine high-density interconnect with 1060nm VCSEL arrays.

Three scale-up MSAs launched at OFC 2026, and the loudest, XPO, was championed by Arista co-founder Andy Bechtolsheim. But Meta's 90 million hours of data took apart its core selling point. Is XPO a bet on extending pluggables' life, or the real answer?

Lumentum nearly doubled revenue as EML and 1.6T products drove a 2,140 bps jump in operating margin. With demand far outstripping supply, how is Lumentum using NVIDIA's capital and new capacity to chase a $2B quarterly revenue target?

An open-source Verilog-A model library finally lets silicon photonics transceivers be designed at 64 Gbps inside standard electronic circuit simulators, adding the RF and noise modeling the industry long skipped, all validated against hardware. Against GlobalFoundries Fotonix, a closed solution topping out at 26.5 Gbaud, it is an open counterexample worth keeping.

AI traffic is reshaping network architecture. Nokia's Q1 highlight was not traditional telecom but 49% revenue growth from AI/cloud customers. With its new San Jose InP fab about to come online, how is Nokia using vertical integration to pull ahead in the 800G wave?

TSV is too expensive and glass can't embed dies, so Singapore's national team turned to mature fan-out packaging (FOWLP) for a 1.6T silicon photonic engine. Coupling loss < 2 dB, wafer-level automated testing and direct-drive friendly — the CPO race is shifting from “can it be built” to “who can build it cheaply.”

Silicon photonics gets the spotlight, but Intel's 0.9 pJ/b 108G PAM4 link shows VCSELs remain an underrated low-power path for short-reach CPO. We walk through this CICC 2026 paper section by section, figure by figure, and identify the last three miles VCSEL CPO must cover to reach volume: equalization, packaging and thermals.

Marvell's 3nm FinFET 212.5Gbps SerDes hits 54.7dB reach and 2.05pJ/bit, the longest-reach and most efficient published at this rate. A shared PLL plus heavy DSP equalization breaks the old rule that reach costs power, giving 1.6T racks structurally more room in cable length and power budget.

Earnings, timelines and shipment volumes all confirmed the optical bull case in the same week, yet Taiwan's silicon photonics stocks hit limit-down. This is a valuation correction, not a demand alarm, and the line between the two hinges on one sentence in next week's Broadcom earnings call.

While the market waits for CPO, Google wrote its answer into 134,000 TPUs with Virgo Network. What holds this fabric up is not exotic packaging but an OCS optical switch six years in the making, and the winners are pluggable optical modules and their upstream suppliers.

AI compute is ushering in the 3.2T optical era. We break down Mitsubishi Electric's latest paper: a 0.8 µm high-mesa EML, a Glass-AlN hybrid substrate, and wire-bond-free packaging that push modulation bandwidth past 100 GHz for next-gen CPO and GPU clusters.