Who says an MZM has to be long? At OFC 2026, Zhangjiang Laboratory used the slow-light effect to shrink a modulator to 500 microns and reached an impressive 400 Gbps per lane without relying on AI algorithms.

An open-source Verilog-A model library finally lets silicon photonics transceivers be designed at 64 Gbps inside standard electronic circuit simulators, adding the RF and noise modeling the industry long skipped, all validated against hardware. Against GlobalFoundries Fotonix, a closed solution topping out at 26.5 Gbaud, it is an open counterexample worth keeping.