SEMICON 2025 Silicon Photonics Summit: TSMC

Introduction

With the rapid growth of artificial intelligence (AI), cloud computing and high-performance computing (HPC), data center demand for bandwidth and energy efficiency is soaring. Traditional electrical interconnect is increasingly hitting a bottleneck — in speed, power and area efficiency alike — and struggles to keep supporting data traffic at scale.

At the SEMICON 2025 Silicon Photonics Summit, TSMC's Dr. 黃欣芬 shared TSMC's latest breakthroughs in silicon photonics (SiPh) and introduced its in-house COUPE (Compact Universal Photonic Engine) platform. The talk not only showcased TSMC's process strengths but also revealed how silicon photonics is becoming a key technology for next-generation AI and data center infrastructure.

Content

Why Is Silicon Photonics the Answer?

To raise bandwidth, traditional copper interconnect relies mainly on "adding more wires" or "raising the signaling rate." This approach has three major limits:

1. Limited wire count: more wires take up more space and complicate system design.

2. Excessive power: high-speed transmission needs larger drive currents, sending overall power consumption sharply higher.

3. Signal attenuation: electrical signals degrade easily over longer distances, reducing reliability.

By contrast, silicon photonics offers the following advantages:

• Multi-dimensional scaling: it can simultaneously add wavelengths (WDM), raise the per-wavelength rate and adopt new modulation formats.

• Better energy efficiency: optical signals attenuate little in transmission, so energy per unit is far below that of electrical signals.

• High integration: compatible with existing CMOS processes, lowering cost and accelerating commercialization.

As a result, silicon photonics is seen as an indispensable technology for data centers and the AI era.

TSMC's Silicon Photonics Platform: COUPE

TSMC's COUPE platform fully demonstrates its integration capability across process and packaging:

1. EIC and PIC hybrid bonding

   • Uses direct copper-to-copper bonding to tightly join the electronic IC (EIC) and photonic IC (PIC).

   • Reduces parasitic resistance and capacitance, improving high-speed transmission performance.

2. Optical coupling methods

   • Grating Coupler: supports vertical light input, suited to wafer-level testing and multi-channel scaling.

   • Edge Coupler: offers low loss, suited to high-performance applications.

3. Modulators

   • Mach-Zehnder Modulator (MZM): mature, stable and reliable design, suited to high-power and high-temperature environments.

   • Micro-Ring Modulator (MRM): tiny footprint and high efficiency, but requires additional thermal control to hold the resonance wavelength.

4. Photodetector

   • Made with germanium, reaching >110 GHz bandwidth and supporting 224 Gbps data rates.

5. Low-loss silicon nitride (SiN) waveguides

   • After optimization, achieves ultra-low loss with a low-temperature process and supports multi-wavelength channels (separating 16 wavelengths at just 1 nm spacing).

Design Tools and PDK

TSMC provides a complete PDK (Process Design Kit) for silicon photonics development:

• The component library covers waveguides, couplers, filters, modulators, detectors, resonators and more.

• Supports electro-optic co-simulation that accounts for electrical, optical and thermal effects together.

• Developers can validate designs through simulation in advance, reducing tape-out risk and shortening development cycles.

This means design houses and system vendors can bring silicon photonic components into products faster, forming a healthy ecosystem.

TSMC's 3D Photonic Engine Design

Beyond 2D planar integration, TSMC also showed a 3D photonic engine design:

• Optimizes the EIC and PIC arrangement through vertical stacking.

• Shrinks system size while maintaining high performance, offering more flexible solutions for AI accelerators, servers and network switches.

Outlook

Closing the talk, 黃欣芬 outlined the future directions for silicon photonics:

1. Speed: support for higher-speed lanes, moving toward Tbps-class applications.

2. Materials: introducing new optoelectronic materials to improve efficiency and stability.

3. Bandwidth: exploring Coherent WDM to break through the limits of conventional WDM.

4. Energy efficiency: continuing to lower energy per bit through advanced packaging and system integration.

Summary

The talk by 黃欣芬 shows that silicon photonics has moved from research to real-world deployment. Leveraging its process strengths, TSMC has launched the COUPE platform, combining EIC and PIC and demonstrating strong capabilities in optical I/O, modulators, detectors and low-loss waveguides.

This not only meets AI and data center needs for bandwidth and energy efficiency, but also paves the way for faster, more energy-efficient computing infrastructure. With new materials, coherent technology and 3D integration coming in, silicon photonics will keep pushing the limits of compute and become a core engine as the semiconductor industry moves toward sustainability and high performance.