At VLSI 2026, Intel showed a fully working silicon photonics microring DWDM transceiver: 16 wavelengths at 50Gb/s each for 800Gb/s per fiber, all with BER<1e-9, at about 5.7pJ/b, with 22nm CMOS stacked directly on the photonic chip in an open-cavity package. We break down this device-to-system CPO reference design figure by figure.

In the era of gigawatt AI factories, the network defines the computer. NVIDIA unveiled 3D-stacked silicon photonics CPO and industry-leading MRM technology to break through the power and reliability limits of AI scaling, and laid out a decade-long roadmap fusing compute and optics.

Silicon photonics leader Lightmatter unveiled microring-based 800G/1.6T interconnect technology at OFC 2026. It tackles thermal compensation in AI compute environments and, through 3D-stacked packaging and integration with the TSMC/ASE ecosystem, marks a new milestone for silicon photonics commercialization.

At OFC 2026, NVIDIA unpacked the design core of single-lane 200Gb/s silicon photonics microring modulators. We break down 3D IC integration, inductive peaking and PN junction trade-offs - the key technology path for CPO interconnects in AI factories.