ECOC 2025 Tech Focus: The Latest Evolution of Ethernet and the Next-Generation Challenges of AI Networks

Introduction

Since its inception, Ethernet has become the foundation of data center and telecom networks through continuous speed increases and standardization. With explosive growth in demand from AI Factories and high-performance computing (HPC), Ethernet now faces new challenges such as 400G/lane, 3.2T modules, and 40 km transmission. In its ECOC 2025 talk, IEEE described a direction of driving technology convergence through standards and highlighted key issues including PAM modulation, electrical/optical interfaces, and testing challenges.

Content

1. Continued Progress in Ethernet Standards

• Today: 400G and 800G are in large-scale deployment, and the 1.6T standard is in progress.

• Future:

  • 2027: 800G becomes widespread in back-end networks.

  • 2029: 1.6T in large-scale adoption, and 3.2T formally arrives.

• Trend: bandwidth requirements for front-end and back-end networks are diverging, and pressure on backplanes and short-reach links in AI networks is becoming more pronounced.

2. Integrating Electrical and Optical Links

• Short reach (Copper / Backplane):

  • Direct Attach Copper (DAC) and host backplane connections are still around, especially within the rack.

  • Although not popular with the optical community, IEEE stressed that "passive copper is still viable".

• Medium to long reach (Fiber):

  • Single-fiber, parallel optics, and wavelength-division multiplexing (WDM) each have their use cases.

  • From 500 m and 2 km to 40 km, Ethernet standards need to cover them all.

3. The Modulation Debate

• PAM-4: the current mainstream, already mature in 400G and 800G modules.

• PAM-6 / PAM-8: promise better bandwidth efficiency, but increase receiver design and FEC complexity.

• Open questions:

  • Should electrical and optical interfaces use the same modulation?

  • Different modulation schemes could fragment the standards.

    👉 IEEE's view: multiple modulation formats may coexist in the future, requiring coordination through standardization.

4. FEC and Architectural Innovation

• FEC (Forward Error Correction):

  • Short-reach links may need only a single code.

  • Long-reach links (10–40 km) may require concatenated FEC (two layers of coding).

  • Example: 800LR1 (10 km) uses concatenated FEC to ensure reliability.

• Architectural challenge: balancing low latency and high reliability, which is especially critical for AI training.

5. Testing Hurdles

• Gap between standards and practice:

  • Even when technically feasible, test and validation complexity is rising sharply.

  • IEEE emphasized that "testing is the biggest bottleneck," because error detection and multi-vendor interoperability take a great deal of time.

• Impact:

  • A gap may open up between standards development and commercial deployment.

  • Test efficiency will directly affect time to market.

6. The Role of Pluggables and Passive Copper

• Pluggables (pluggable optical modules): will continue for at least one more generation.

• Passive copper: even as optics advance quickly, copper keeps its low-cost, low-power advantage over short reaches.

  👉 IEEE's stance is pragmatic: multiple interconnect approaches will coexist, rather than a single technology dominating.

Conclusion

IEEE's ECOC 2025 talk pinpointed the core challenges Ethernet faces in AI networks:

1. Speeds keep climbing: 400G → 800G → 1.6T → 3.2T, on a clear timeline.

2. Electrical and optical coexist: copper may not be fashionable, but it still has value over short reaches.

3. Modulation and FEC diversify: PAM-4 remains mainstream, but PAM-6/8 may gain ground, and FEC architectures will become more complex.

4. Testing is the hardest problem: multi-vendor interoperability and reliability validation will determine how fast standards are deployed.

5. Pluggables and passive copper won't disappear: they will remain important for at least one to two generations.

Overall, IEEE's message is clear: Ethernet standards are actively responding to the challenges AI brings, but the real deciding factor is not just speed—it is the balance among reliability, test efficiency, and the coexistence of multiple technologies.