FOCI's Six Core FAU Patents Are All Telling the Same Story
Ever since TSMC announced COUPE commercialization for 2026, the CPO (co-packaged optics) market has loved to talk about silicon photonics engines and the bandwidth race from 3.2T to 6.4T. But what really determines whether CPO can be produced cheaply at volume is an unglamorous step: how to connect fiber to a silicon photonics chip quickly, precisely and cheaply.
This step is called fiber-to-chip coupling, and it is the most expensive, slowest and hardest-to-yield part of CPO packaging. Over the past few years, FOCI (3363) has built a whole portfolio of patents around it.
When I laid out FOCI's six recent core patents directly related to CPO / FAU, I found that while they cover six different things, together they are really about one thing: "engineering" fiber-to-chip coupling, turning hand alignment by skilled technicians into a repeatable, pluggable and testable standard process on the production line.
Five Common Threads Across the Six Patents
Stack these six patents onto a single CPO package and you see five shared design principles:
Passive alignment: V-grooves, alignment pins and beveled bumps let the mechanics self-locate, eliminating the most expensive active alignment labor.
45° total internal reflection turning: an angled facet turns vertical light 90° into the chip, replacing grating couplers whose efficiency is hard to push.
Pluggability: the fiber is not permanently bonded but plugged in as a connector, so it can be removed, repaired and yield-tested in stages.
Mode-field conversion: shrinking the fiber's 3–10 µm mode field down to the 0.2–0.9 µm of a silicon photonics waveguide.
Process acceleration: UV reflective curing and wafer-level testing before dicing directly build in yield and throughput.
Each patent below is simply one or two of these five threads made concrete.
Six Core Patents and Their Status
(Insert the six-patent comparison table here, taken from Section 7 of the HTML illustrated report)
Patent 1 | Pluggable optical package structure (US12411295B2 granted / TWI842485B granted)
Patent 2 | Optical component assembly and alignment structure (US12197022B2 / granted in TW and CN as well)
Patent 3 | Chip-to-chip optical interposer (US12468098B2 granted / TW / CN)
Patent 4 | Semiconductor structure with UV reflective curing (US12449609B2 granted / TW / CN)
Patent 5 | Optical probe package structure for wafer-level testing (US11947172B2 / TWI805350B granted)
Patent 6 | Optical component alignment structure with passive self-alignment (US11921334B2 / divisional US12306448B2 granted / TW)
All six are filed in the US, and five of them also cover Taiwan and China.
The Most Important One First: Pluggable Packaging
Once CPO packages the PIC and EIC together, it has a fatal weakness: if the fiber interface fails, or a single chip has poor yield, the whole package is scrapped. FOCI's pluggable optical package structure combines a socket, a connector and a fiber array connector to make the optical connection pluggable: the fiber plugs into a socket rather than being bonded in place.
This is a key step for CPO from "unserviceable" to "serviceable and replaceable," and it is the patent foundation behind FOCI's flagship RelFACon (reworkable fiber array connection).
That wraps up the key points of this article.
STT's full analysis, how the six patents complement each other along the same optical path, which one is the hidden process moat, and a key judgment: why "having the patents" does not equal "having the position," and the single signal that really matters, is available in the paid section (in Chinese), including a breakdown of all 7 original schematic diagrams, the process moat, and a combined assessment table of "timing × technology path × positioning × risk."
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