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SEMICON 2025 Silicon Photonics Summit | Ayar Labs: Optical I/O Chiplets for Gigawatt-Scale AI Factories

3 days ago
2 min read

Introduction

AI factories are scaling rapidly, and a single data center has become a giant compute unit consuming multiple gigawatts of power. As GPU counts multiply and models grow, traditional electrical interconnect is running into bottlenecks in bandwidth, reach and power.

Ayar Labs, a startup focused on Optical I/O & Electro-Photonics Integration, presented its solution at SEMICON 2025: using optical chiplets and optical I/O to break the limits of electrical links, support future scale-up networks of thousands of GPUs, and at the same time optimize Throughput per $ per Watt.

Content

1. The energy challenge of AI factories

  • Take Meta's Hyperion data center as an example: a single campus is planned to draw 2 GW by 2030, and even more than 5 GW by 2035 — more than the total household electricity consumption of the entire state of Louisiana.

  • This highlights the severe challenge of power density and energy efficiency: relying only on copper and traditional electrical links, future infrastructure will struggle to keep up.

2. The bottleneck of electrical interconnect

  • Past: 32 GPUs per rack → about 50 kW.

  • Present: 144 GPUs → power rises to 150–200 kW.

  • Future: NVIDIA's published roadmap shows 500+ GPUs per rack coming soon, with a single rack potentially exceeding several hundred kW.

  • The root problem: the "bandwidth vs. reach" trade-off of electrical links limits how far GPU clusters can scale.

3. Ayar Labs' optical solution

Ayar Labs proposes breaking through these limits with optical I/O and optical chiplets:

  1. Multi-die advanced package architecture

    • The optical chip is treated as a chiplet and integrated directly into the GPU/ASIC package.

    • It provides optical transceiver ports supporting high-bandwidth, low-latency transmission.

  2. UCIe optical chiplet (an industry first)

    • Developed with GlobalFoundries on a 45nm process — the first UCIe optical chiplet.

    • Specs:

      • 8 TB/s total bandwidth (4T+4T)

      • 16-wavelength WDM optical channels

    • It marks a first step toward standardized optical I/O and could become a common industry interface.

  3. Optically Connected Memory

    • Ayar Labs proposes bringing optical interconnect into memory access, reducing the latency of AI models' token/cache accesses.

    • This would further improve AI system throughput and energy efficiency.

4. Optimizing performance and TCO (total cost of ownership)

Ayar Labs stresses that the true metric for AI systems is Throughput per $ per Watt:

  • Traditional electrical interconnect: as GPU counts rise, performance gains are limited while power climbs sharply.

  • Optical I/O: supports larger GPU clusters within the same power envelope.

  • Optical I/O + optical memory: could deliver a 5–10× performance gain while optimizing TCO and energy efficiency.

5. Reliability and industry partnerships

  • Ayar Labs puts its optical chiplets through rigorous thermal cycling tests to ensure stability in long-term operation.

  • Through TSMC process technology + Alchip package design + ecosystem partners, it is building a complete supply chain so optical I/O can reach volume production.

Summary

Ayar Labs' SEMICON 2025 talk laid out its vision of the "Chipletization of Optics":

  • Breaking the bandwidth/reach bottleneck of electrical links, supporting scale-up networks of thousands of GPUs.

  • Standardized optical I/O (UCIe chiplet), driving industry-wide adoption.

  • Optical memory integration, further reducing latency and boosting AI performance.

  • Energy-efficiency optimization, keeping AI factories economical even at gigawatt-scale power consumption.

For Ayar Labs, optical I/O isn't just a single technology breakthrough — it is the key engine for a "triple win" in AI factory performance, cost and energy efficiency.

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