OCP Global Summit 2026 | Meta | Vimal Vasudevan, Ashutosh Grewal | Tahan: An Open, Ethernet-Based Scale-Up Switch for MTIA
1. Why Meta Built Its Own Scale-Up Switch
In this 16-minute talk, Meta network hardware TPM Vimal Vasudevan and software engineer Ashutosh Grewal answer a practical question: when you build your own accelerator, who supplies the switch for its scale-up domain?
The slides describe the industry status quo: scale-up networks usually arrive as a closed bundle from a single vendor, with accelerators, switches, cabling and software sold together. The result is limited flexibility, roadmaps controlled by someone else, and little leverage over cost or supply. Once Meta had MTIA (Meta Training and Inference Accelerator), that model stopped working: a closed fabric cannot natively connect custom silicon, and adopting one would mean giving up the control and efficiency that custom silicon was meant to win back.
Meta's answer is Tahan, Meta's first open, Ethernet-based scale-up switch, designed specifically for MTIA 300 training accelerators. We covered the broader trend of Ethernet moving into scale-up in OCP APAC Summit 2026: Ethernet Starts Eating Scale-Up; this piece is about what the buyer actually built.
The most novel thing about this switch is how little in it is new.
2. Hardware: Only Half of the Switch Capacity Goes to Accelerators
Tahan's key specifications:
ASIC: Broadcom Tomahawk 5, 51.2 Tbps (BCM78900)
Form factor: 1OU, hybrid liquid/air cooling, deployed in ORv3-HPRv1 racks
High-speed signals: PHY-less design, with flyover cables running directly from the ASIC to the backplane connectors
Ports: 32 x 800GE toward the cable backplane, connecting 16 accelerators with 2 links each; 32 x OSFP 800GE on the front panel, marked "reserved" for optional cross-rack connectivity
Control plane: Intel Xeon Netlake micro-server running CentOS and FBOSS; Aspeed AST2620 BMC
One number is easy to miss. 32 ports of 800G is 25.6 Tbps, exactly half of Tomahawk 5's capacity (STT calculation); the other half sits on the front panel. In other words, Meta has reserved half the switching capacity for cross-rack expansion.

▲ The Tahan domain: 16 accelerators each connect to 4 Tahan switches with 2 x 800G links, for 6.4 Tbps unidirectional per accelerator, non-blocking (Image source: Meta | 2026 OCP Global Summit presentation)
The bandwidth math: each accelerator has 8 x 800GbE links, split evenly across 4 Tahan switches at 2 links each, for 6.4 Tbps per direction; the whole domain totals 102.4 Tbps per direction (STT calculation).
3. Latency: The Bottleneck Is the Switch, Not the Cable
Meta laid out latency clearly:
Always one hop: any two accelerators are separated by exactly one Tahan switch, with no second tier
Under 1 µs per hop, currently in store-and-forward mode
One 1.5 m twinax leg on each side, about 7 ns each
Cables account for only about 1.5% of the fabric path; the slide's conclusion is "the switch is the budget"
Cut-through mode (forwarding as soon as the header arrives, without waiting for the full frame) is being evaluated and would cut another 25%
From the Q&A: this is unidirectional accelerator-to-accelerator latency and includes the switch; the slide footnote adds that it covers the fabric path only, excluding the NIC, PCIe and host software.

▲ Tahan single-hop latency is under 1 µs, each of the two 1.5 m twinax segments adds about 7 ns, and cut-through mode cuts another 25% (Image source: Meta | 2026 OCP Global Summit presentation)
These numbers matter more to optical communications than they first appear. From 7 ns per 1.5 m, twinax propagation is about 4.7 ns per meter; typical fiber is about 5 ns per meter, the same order of magnitude. Stretching both legs to 50 m each would add about 455 ns of propagation delay (about 485 ns over fiber), close to half of today's 1 µs budget, and that is before counting the processing latency of the optical modules themselves (STT calculation).

▲ Tahan single-hop latency breakdown (STT estimate, using 1 µs as the ceiling): the switch is about 98.5% and the two twinax segments total 14 ns; cut-through saves up to about 250 ns, equal to the propagation delay of stretching each cable to about 28 m (Image source: Simple Tech Trend original; data from Meta 2026 OCP Global Summit presentation)
So our view is this: the bar for optics in scale-up is not only pJ/bit, it is also latency. Cut-through saves at most about 250 ns (25% x the 1 µs upper bound), headroom that can be traded for distance or kept for a larger domain. Asked in the Q&A about Tomahawk Ultra, Meta said it will be evaluated for the next generation, not for the current deployment.
4. Software: Same FBOSS, Half the Features Turned Off
Grewal described this part as "not very visible, but one of the most important": the operating system.
Meta's scale-out fabrics (DSF, NSF, FPF) all run on its open-source FBOSS, and so does Tahan, running Agent, QSFP Service and FSDB on the switch's own x86 CPU. Config generation, software upgrades, maintenance, monitoring, alerting, dashboards and runbooks are all reused, so there is no need to staff a separate operations team for a proprietary scale-up switch.
The differences live only in configuration:
Category | Reused from scale-out | Turned off in scale-up |
Forwarding | IPv6 dataplane, interface routes | Routing protocols such as BGP |
Lossless and multipath | PFC lossless classes, AI-tuned QoS | ECMP, dynamic load balancing, UDF hashing |
The logic is simple: a single-hop network needs no dynamic routing, and with fixed paths it needs no multipathing. A scale-up switch is not a more complex switch; it is a simpler one. That is a signal to ASIC vendors: differentiation in scale-up silicon will come from latency, radix and link-layer reliability, not routing features.
5. Next Generation: Domain 4.5x, Links 13.5x
Meta also previewed its next-generation scale-up fabric:
72 accelerators, each with 24 x 400G links to 8 switches, 3 links per switch
9.6 Tbps per accelerator per direction, 1.5x Tahan, still non-blocking and single hop
Switches move to Broadcom Tomahawk 6 (102.4 Tbps), with 216 x 400G ports each

▲ Meta's next-generation scale-up fabric: 72 accelerators, each with 24 x 400G links to 8 Tomahawk 6 switches, for 9.6 Tbps unidirectional per accelerator (Image source: Meta | 2026 OCP Global Summit presentation)
Put the two generations side by side and you can see what Meta is scaling:
Metric | Tahan | Next gen | Multiple |
Accelerators | 16 | 72 | 4.5x |
Per-accelerator BW (per direction) | 6.4 Tbps | 9.6 Tbps | 1.5x |
Domain aggregate BW (per direction) | 102.4 Tbps | 691.2 Tbps | 6.75x |
Accelerator links | 128 x 800G | 1,728 x 400G | 13.5x |
Switch capacity used by accelerators | 50% | ~84% |
(The last three rows are STT calculations.)
Why 400G and not 800G? Each switch must connect 72 x 3 = 216 ports, and 102.4T split into 800G gives only 128 ports. Without enough radix, the only option is narrower ports. It is the same logic as "slow and wide" on the optics side: a bigger domain needs more, narrower channels.

▲ From Tahan to the next generation: per-accelerator bandwidth grows only 1.5x, the domain grows 4.5x, accelerator link count grows 13.5x, and switch capacity utilization rises from 50% to about 84% (Image source: Simple Tech Trend original; data from Meta 2026 OCP Global Summit presentation)
Meta says these 72 accelerators sit in a single rack, but did not say what cabling the next generation uses, when it deploys, or which MTIA generation it serves. With 1,728 links, cabling, connectors and the backplane become the real challenge of the next generation. For where copper and optics split in scale-up, see OCP APAC Summit 2026: SemiAnalysis, Scale Up Sophistry.
6. Standards: ESUN, LLR and CBFC Each Own a Layer
Finally, Meta distilled its lessons into three specs:
ESUN: replaces 48 bytes of IPv6 + UDP headers with about 4 bytes, raising goodput per frame. The slide says the OCP base spec Rev 1.0 is approved, driven together with Microsoft.
LLR (Link Layer Retry): replays at the link layer within one link round trip, so the transport never sees the loss. In the Q&A, Meta said LLR is the way to go for scale-up domains.
CBFC (Credit-Based Flow Control): the sender transmits only against the receiver's buffer credits, staying lossless with less buffer than PFC; Meta will offer it alongside PFC as an option.
LLR and CBFC are UEC specs required by ESUN and will arrive in next-generation scale-up ASICs. The Q&A also clarified the division of labor: ESUN is the forwarding layer and MetaRoCE is the transport layer; they are complementary, not either-or.
7. Risks and Counterarguments
The latency figure covers the fabric only: under 1 µs excludes the NIC, PCIe and host software, so application latency will be higher and the switch's share will be diluted.
Cut-through is still under evaluation: 25% is an exploration target on the slide, not a production number.
Key numbers are undisclosed: a target BER is defined but not public, and rack power was described only as "much more than a Minipack"; both await the hardware spec contribution to OCP.
The next-gen medium is unclear: although the 72 accelerators share one rack, the talk did not say whether 1,728 x 400G links still run on 1.5 m-class twinax, so our latency math is a scenario, not Meta's plan.
ESUN version discrepancy: the slide says Rev 1.0 is approved, while auto-captions heard "1.1 published yesterday"; defer to the official release.
Open does not mean multi-vendor: both generations use Broadcom silicon. Real alternatives at the ASIC layer depend on when other ESUN-compatible ASICs ship; for scale-up SerDes choices, see ECOC 2026: Fast-Narrow vs Slow-Wide, Scale-Up Optics Hinge on the SerDes at the Chip Edge.
8. What It Means for Taiwan's Supply Chain
The BMC is the only component on the slides that maps clearly to a Taiwanese vendor. Tahan uses an Aspeed AST2620 BMC. Scale-up switches are a new switch category, 4 per MTIA rack today and 8 in the next generation, each with its own BMC, so this is additional BMC volume rather than substitution (STT inference).
Cabling and the backplane are the biggest increment in the next generation, but no suppliers were named. Links grow from 128 to 1,728, scaling demand for flyover cables, backplane connectors and in-rack harnesses. Taiwanese cable and connector makers know this field well, but the talk did not disclose suppliers, so it is unwise to guess.
Switch ODMs have a new product line to compete for. The Tahan hardware spec will be contributed to OCP, meaning white-box makers can build to it. The talk did not disclose Tahan's manufacturer.
9. Conclusion
Tahan matters not because its specs are spectacular, but because Meta showed that a scale-up switch can simply be an Ethernet switch with features removed: merchant silicon, the same FBOSS, the same operations, and routing plus multipathing turned off.
But the challenge has moved in the next generation. Per-accelerator bandwidth grows only 1.5x while links grow 13.5x; the latency budget sits almost entirely in the switch, so every extra meter of cable competes with the switch for budget. Our view: Meta's next-generation scale-up will stay single-hop and short-reach as long as it can, and the timing of optics entering scale-up depends on how much latency the switch can free up. Three things to watch over the next 12 months: the power and BER figures published with the Tahan spec at OCP, whether Tomahawk Ultra enters the next generation, and what medium carries the 1,728 links.
The scale-up contest is shifting from a protocol fight to a fight over link counts and latency budgets.
This article is for technology and industry trend analysis only and does not constitute investment advice.




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