TSMC's 52 Silicon Photonics Patents Are All Doing One Thing: Building an Entire Optical Path
Over the course of this series, we have dissected the patents of four CPO supply chain players: FOCI on fiber arrays (FA), Largan on coupling lenses, SENKO on pluggable connectors, and Teramount on self-aligned coupling. However different they are, each is essentially "one component on the optical path."
TSMC is not. It is a foundry that builds the entire optical path.
I laid out all of TSMC's publicly searchable silicon photonics patents; after de-duplication there are 52 distinct inventions. To make sense of them, you can't think in terms of "components." You have to follow "the life of light" layer by layer: generating light, modulating it, guiding it, getting it in and out, packaging it, and finally the system and volume production. Stack these six layers together and you get what TSMC calls COUPE (Compact Universal Photonic Engine).
The Life of Light: TSMC Builds Every Layer Itself
Generating light | Laser integration: silicon doesn't emit light, so III-V lasers are embedded in silicon, with evanescent coupling to guide the light and mirror-based alignment.
Modulating light | Active devices: modulators (MZ / ring PAM / SIS) write electrical signals onto light, and Ge-on-Si photodetectors read light back into electrical signals.
Guiding light | Waveguides and tuning: low-loss stacked Si/SiN waveguides, bypass waveguides to avoid crossings, thermo-optic heaters, and polarization splitter-rotators.
Getting light in and out | Couplers: grating couplers, dual-etch, buried reflectors, apodized + taper designs, dual silicon lenses, and even turning the layout into EDA.
Packaging light | COUPE package integration: interposer waveguides with dual electrical/optical routing, 3D-stacked photonic dies, optical engines, backside routing, and fan-out.
System and volume production | WDM + EDA + test: ring-resonator WDM, slab-waveguide QAM, parameterized layout, and wafer-level electro-optical co-testing.
All six layers share a single goal: turning silicon photonics into a platform that, like CMOS, can be designed, manufactured by a foundry, and produced in volume.
Layer One: Putting the Light Source into Silicon
Silicon itself does not emit light, so the first hurdle is integrating III-V lasers into the silicon platform. TSMC's patents at this layer cover laser die embedding plus silicon support structures, the use of evanescent coupling to guide laser light into silicon waveguides, and mirror-based alignment to keep the optical path aligned.
This lets a "foundry platform" supply the light source too. TSMC has platformized the very hurdle that gives many pure-play silicon photonics companies the biggest headache. And this is only the first of six layers.
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That wraps up the key points of this article.
STT's full analysis, a patent-by-patent breakdown of all six layers (generating / modulating / guiding / coupling / packaging / system and volume production), plus the hard specs disclosed in the patents (SIS modulator Vπ·L <0.1 V·cm, grating coupling ~1dB/73.6%, waveguide LER 0.3nm, package alignment ±2µm, WDM thermal tuning 70pm/K…), the complete list of 52 patents, and the most important judgment: why TSMC's real moat is not any single patent, and how its choice of which layers to open to the ecosystem and which to keep for itself will determine whether "single-slot players" like FOCI, Largan, SENKO and Teramount complement the platform or get absorbed by it, is available in the paid section (in Chinese), including all 7 original schematic diagrams, a layer-by-layer spec table and a positioning assessment table.
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