USFP Explained: How NVIDIA and Cisco's New 400G/lane Pluggable Compares with XPO, OSFP-XD and QSFP-DD

2 days ago

11 min read

1. Why a new form factor, and why now

The problem isn't optical. It's electrical.

Switch-chip SerDes are about to turn the corner to 400G per lane: the next generations from Broadcom, NVIDIA and Cisco Silicon One will all default to a 400G electrical interface. Yet optical module packaging, from QSFP to OSFP, has always relied on the same thing: a paddle card plugged into an edge-card connector, with gold fingers pressing against spring contacts. That structure held up at 100G and 200G per lane, but at 400G per lane (a PAM4 Nyquist frequency of roughly 100 GHz), the connector's insertion loss, impedance discontinuities and return loss eat the entire link budget.

Arista already ran into the same challenge with XPO: the first-generation XPO connector rolls off beyond 80 GHz, and it took Foxconn's improved cartridge connector to push past 100 GHz. We covered this in our breakdown of XPO at the 2026 OCP APAC Summit (in Chinese).

So NVIDIA and Cisco's judgment is: 400G per lane can't be squeezed out of the old connector for one more generation; it needs a new electrical interface. Bill Gartner, who leads Cisco's optics business, put it bluntly: pushing pluggables to 400G per lane can't be just another incremental extension of today's modules.

Pluggables aren't hitting an optical limit. They're hitting a connector limit.

For the full background on the power and density bottleneck pluggables face at the front panel, see [CPO Explained 1/6] Have Pluggable Optics Hit the Wall?. USFP is the latest answer to that problem for the 400G/lane generation.

2. USFP specs at a glance

First, let's pin down the numbers disclosed so far (based on the NVIDIA/Cisco press releases and the OCP on-site presentation; the MSA specification has not been published yet):

Item	USFP disclosed specs
Full name	Ultra-Dense Small Form Factor Pluggable
Initiators	NVIDIA and Cisco; TE Connectivity and Amphenol collaborating on cage, connector and module
Electrical lane rate	400Gb/s per lane (native design), backward compatible with 200G per lane, with better performance
Lane count	First generation is x16 full duplex; the connector architecture scales to x32 and beyond
Bandwidth per module	x16 = 6.4T; up to 12.8T (x32)
Footprint	First generation is roughly OSFP-sized
Connector	2D-array connector with two-stage insertion: the module first seats into position, and only then do the high-speed contacts engage
Power / thermal	Up to 100W, with no dedicated cooling loop required inside the module
Optical architecture	Every configuration supports simplified signal-processing designs (LPO/LRO-style), across multiple reaches
Host side	Suitable for both switches and SuperNICs
Benefits (official claims)	Versus a 200G/lane module of the same footprint: 4x the bandwidth and front-panel density, and about 1.3x the power efficiency
Standardization status	Announced October 12, 2026; an open, community-led MSA is "coming soon," with membership and timeline not yet disclosed

▲ The USFP module unveiled by NVIDIA and Cisco at OCP 2026. The first generation fits 16 full-duplex 400G lanes into an OSFP-sized footprint | Source: NVIDIA Newsroom (Oct 12, 2026)

▲ Cisco calls USFP the industry's first pluggable form factor designed for 400G SerDes lanes, offered in x16 (6.4T) and x32 (12.8T) versions | Source: Cisco, via All About Circuits (Oct 12, 2026)

Three design decisions are worth unpacking:

2.1 The 2D-array connector: from a row of contacts to a plane of contacts

OSFP and QSFP-DD gold fingers line up in a row along the edge of the paddle card, so adding lanes means either widening the card or adding another row (OSFP-XD uses two rows of 60 contacts each). USFP switches to a 2D array, spreading contacts across a plane, so the lane count can grow without significantly widening the module. That's why it can promise 32 lanes and beyond later on.

▲ Conceptual illustration of the evolution from single-row gold fingers (QSFP-DD/OSFP) and dual-row gold fingers (OSFP-XD) to USFP's 2D array with two-stage insertion; not actual contact counts or geometry | Source: Simple Tech Trend, based on NVIDIA/Cisco press releases, the OSFP MSA and public Amphenol materials

Looking at today's connectors in the flesh makes it clear why "adding another row" is already the limit of the gold-finger architecture:

▲ QSFP-DD host-side PCB connector and stainless-steel cage assembly; the connector is a 76-position right-angle surface-mount design at the rear of the cage | Source: Connector Supplier (Bishop & Associates, Robert Hult, Jun 2025)

▲ Amphenol OSFP-XD ExtremePort connector, with two rows totaling 120 surface-mount contacts at 0.6 mm pitch; the cage design supports 40W and 32 ports per 1U | Source: Amphenol Communications Solutions

2.2 Two-stage insertion: align first, then make contact

A traditional pluggable slides straight in, with the gold fingers scraping across the spring contacts the whole way. USFP instead slides the module into position first and engages the high-speed contacts only in the final step. That brings three benefits: less contact wear (at 400G per lane, plating wear translates directly into signal loss), better signal integrity, and predictable insertion force. It's the logic of server board-to-board connectors, brought to the front panel.

2.3 100W, no built-in cooling loop

This line is aimed squarely at XPO. XPO's approach builds a liquid cold plate into the module; USFP deliberately emphasizes that no dedicated cooling loop is needed inside the module, meaning thermal responsibility stays on the switch side (air-cooled heatsinks or a riding cold plate), and module manufacturing and servicing stay the same as today's OSFP. The official pitch is that this lowers switch design complexity and improves reliability.

One number that needs clarifying: the press release says "capacity up to 12.8Tb/s," but the first-generation x16 × 400G is 6.4T (which also matches the claim of "4x a 1.6T OSFP in the same footprint"). Cisco's Rakesh Chopra confirmed in his presentation that USFP comes in x16 and x32 versions, corresponding to 6.4T and 12.8T. So read the first generation as 6.4T per module; 12.8T is the x32 version. NVIDIA also says per-lane bandwidth doubles while power rises only 1.5x, which is where the "1.3x power efficiency" figure comes from; thermally, it is compatible with both air-cooled and liquid-cooled system architectures.

3. Four form factors side by side: USFP, XPO, OSFP-XD, QSFP-DD1600

Item	QSFP-DD1600	OSFP-XD	XPO	USFP
Led by	QSFP-DD MSA (60+ companies)	OSFP MSA	Arista-initiated XPO MSA (formed Mar 2026)	NVIDIA + Cisco, with TE and Amphenol
Electrical lanes	8	16 (two rows of 60 contacts each)	64 (two 32-channel paddle cards)	16 → 32+
Rate per lane	200G (224G PAM4)	100G today; 200G in the future	200G today; 400G on the roadmap	Native 400G
Bandwidth per module	1.6T	1.6T → 3.2T	12.8T → 25.6T	6.4T (x16) → 12.8T (x32)
Form factor	18.35 mm wide, QSFP family	OSFP family, taller and longer than OSFP	60.8 × 111.8 × 21.3 mm, about 2.7x the width of OSFP	First generation roughly OSFP-sized
Electrical interface	Single paddle card with gold fingers	Dual-row gold fingers, 1.2 mm paddle card	Card-edge connector; next-gen cartridge connector (Foxconn)	2D-array connector, two-stage insertion
Power ceiling	About 25W+ (typical), with enhanced thermal design	About 40W, air-cooled	400W (relaxed to 500W in the new revision)	100W
Cooling	Air	Air	Liquid cold plate built into the module, 48V direct input	No cooling loop built into the module
Backward compatibility	Compatible with QSFP-DD/QSFP28, etc.	Not compatible with OSFP	All-new	All-new
Host side	Switches, NICs	Switches, coherent	Switches (no NICs)	Switches, SuperNICs
Spec status	Rev 7.0 (2023) / 7.1 (Jun 2024)	Rev 1.11 (Nov 2025)	MSA 1.0 under review, systems after 2027	Just announced Oct 2026, MSA yet to be formed

▲ Front-face dimensions (to scale), lane counts and per-module bandwidth of the four candidate form factors for the 400G/lane generation | Source: Simple Tech Trend; data from the QSFP-DD MSA, OSFP MSA, Arista XPO whitepaper and NVIDIA/Cisco press releases

The table looks like a four-way choice, but it really should be read as two groups.

3.1 The extenders: QSFP-DD1600 and OSFP-XD

These two squeeze one more generation out of existing MSAs. QSFP-DD's selling points have always been backward compatibility and its narrow 18.35 mm body, but 8 lanes is its ceiling: 1.6T at 200G per lane, and 3.2T only at 400G per lane, which is precisely where gold fingers can't keep up. OSFP-XD goes the other way, doubling lanes from 8 to 16, but it was designed around 100G/200G lanes and 40W air cooling, originally positioned for 1.6T and coherent 1600ZR. Neither redesigned its connector for 400G per lane.

3.2 The redesigners: XPO and USFP

Both XPO and USFP give up backward compatibility and redefine the electrical and mechanical interface. The difference is which variable they lean on to solve density:

XPO bets on "more lanes": 64 lanes at 200G per lane makes the module 2.7x as wide as OSFP and sends thermal density soaring, so the liquid cold plate has to go inside the module, with a 48V bus feeding it directly.
USFP bets on "faster lanes": at 400G per lane, just 16 lanes deliver 4x the bandwidth in an OSFP-sized footprint, within 100W, keeping today's module form.

▲ Arista's XPO liquid-cooled pluggable module: 64 channels and 12.8T in a single module | Source: Arista Networks, via Futuriom (Mar 2026)

▲ For the same 204.8T switch chip, 1.6T OSFP needs 4U and 128 ports; XPO fits 64 200G channels into the space of two OSFPs, for 4x the lane density and 8x the bandwidth | Source: Arista Networks (Andy Bechtolsheim presentation), via The Next Platform

▲ XPO exploded view: two 32-channel paddle cards sandwich a central cold plate back to back; each card's area equals two OSFPs side by side, so existing DSPs, TIAs and drivers can be reused | Source: Arista Networks, via The Next Platform

▲ Front-panel fiber connector options supported by XPO | Source: Arista Networks, via The Next Platform

4. Front-panel density breakdown: USFP is really chasing XPO

Put both on the same 1U front panel and the result gets interesting (the following are STT estimates, not official figures):

1.6T OSFP (200G/lane) | Bandwidth per module: 1.6T; modules per 1U: 32; front-panel bandwidth per 1U: 51.2T; total module power ceiling per 1U: about 1 kW (30–40W each)

XPO (200G/lane) | Bandwidth per module: 12.8T; modules per 1U: 16 (official: 204.8T/OU); front-panel bandwidth per 1U: 204.8T; total module power ceiling per 1U: 6.4 kW (400W each, liquid-cooled)

USFP x16 (400G/lane) | Bandwidth per module: 6.4T; modules per 1U: 32 (assuming the OSFP layout); front-panel bandwidth per 1U: 204.8T; total module power ceiling per 1U: 3.2 kW (100W each)

XPO (400G/lane, roadmap) | Bandwidth per module: 25.6T; modules per 1U: 16; front-panel bandwidth per 1U: 409.6T; total module power ceiling per 1U: 8 kW (500W each)

▲ Front-panel bandwidth and total optics power ceiling per 1U. By doubling lane speed, USFP x16 matches the 204.8T of 200G-generation XPO, but each 1U has to absorb 3.2 kW | Source: Simple Tech Trend estimates; power figures are spec ceilings, not measurements

Three observations:

First, USFP x16 exactly matches 200G-generation XPO at 204.8T per 1U. NVIDIA and Cisco reach with "double the lane speed" the density Arista reaches with "8x the lane count plus liquid cooling," one generation later. In other words, USFP's real rival isn't today's XPO but 400G-generation XPO (409.6T per 1U). Catching up to that number will take the x32 version.

Second, the real challenge is 3.2 kW per 1U. A row of 32 100W modules packed into the front panel is very hard to handle with air alone. "No built-in cooling loop in the module" doesn't mean "fans only"; the switch side will likely still need a riding cold plate. What USFP eliminates is liquid-cooling hardware in the module, not liquid cooling for the whole switch.

Third, read the efficiency numbers carefully. A measured XPO LRO module draws about 130W in total, roughly 10 pJ/bit; USFP's 100W is a ceiling, which works out to about 15.6 pJ/bit at most for x16. The official "1.3x power efficiency" is relative to 200G/lane modules; real pJ/bit will have to wait for measurements on the first modules.

5. Why NVIDIA and Cisco are doing this together

Understanding this pairing matters more than understanding the specs.

NVIDIA needs a 400G/lane form factor that fits into a SuperNIC. XPO explicitly targets switches only, not NICs: a 64-lane liquid-cooled giant can't fit on a network card. But NVIDIA's Spectrum-X is a complete package of switches plus SuperNICs, and both ends need the same module. USFP's OSFP-sized x16 covers both ends.

Cisco needs a path that Arista doesn't define. The XPO MSA was initiated by Arista with Bechtolsheim as its champion; it has many members, but Arista holds the pen. Cisco competes head-to-head with Arista in data center switching and can't let its rival define the front panel of its next-generation switches.

Both companies are also doing CPO. NVIDIA has Spectrum-X/Quantum-X Photonics, and Cisco has its own CPO solution. USFP's existence is a public admission that CPO still won't be the only option in the 400G/lane generation. If customers want pluggables, they get pluggables. This is consistent with our earlier view that the CPO ramp is delayed and the shelf life of pluggables has been extended.

TE and Amphenol joining also matters: both supply connectors for OSFP and QSFP-DD, while XPO's connector development is led by Foxconn (FIT Hon Teng). Which side the connector makers take this generation will determine whose supply chain matures first.

6. What it means for the supply chain

Connectors and cages: USFP's 2D-array connector is an all-new product, putting TE and Amphenol front and center; XPO uses Foxconn's cartridge connector. Whichever camp wins, the connector's share of value in the 400G/lane generation will be a tier higher than in the OSFP generation.
Optical module makers: USFP keeps the OSFP size and no built-in liquid cooling, closest to current production lines and mechanical capabilities, so the switching cost is lower than XPO; XPO requires module makers to master cold plates, sealing, quick-disconnect fittings and leak detection.
Optical components: 16 lanes × 400G modules also drive demand for 400G-per-lambda EMLs, thin-film lithium niobate (TFLN) modulators, or silicon photonics plus CW lasers. A 100W design without built-in cooling also means lasers must stay efficient and reliable at higher operating temperatures.
DSP vendors: both USFP and XPO emphasize support for LPO/LRO-style simplified signal-processing architectures. At 400G per lane, the power pressure of full-DSP modules will make half-retimed designs one of the mainstream options.

If you're not yet familiar with the naming logic behind module specs (form factor, rate, reach, fiber and interface), start with What Does OSFP 800G SR8 Actually Mean? The Five Axes of Optical Module Naming.

Conclusion

USFP isn't the next version of OSFP; it's NVIDIA and Cisco's direct response to Arista's XPO. Both agree that pluggables must redo the connector for the 400G/lane generation; where they diverge is what they trade for density: XPO trades lane count and liquid cooling; USFP trades lane speed.

QSFP-DD1600 and OSFP-XD, the two extension paths, are already clearly a step behind in the 400G/lane generation. The landscape ahead is more likely three paths coexisting: XPO (switches, liquid cooling, very large modules), USFP (switches plus SuperNICs, OSFP-sized) and CPO (ultimate power efficiency), each matching different customers' data center conditions.

Three things to watch next:

USFP MSA membership: whether Arista joins, which side Broadcom takes, and whether major module makers (Innolight, Eoptolink, Coherent) bet on both.
Measured power of the first x16 modules: 100W is the ceiling. Whether real modules land at 60W or 90W will decide whether 32 ports per 1U can be air-cooled.
Measured data for 400G/lane connectors: between USFP's 2D array and XPO's Foxconn cartridge connector, whichever first proves a channel beyond 100 GHz gets the first production timeline.

This article is for technology and industry trend analysis only and does not constitute investment advice.

References

NVIDIA Newsroom, "NVIDIA and Cisco Introduce New Pluggable Optics Form Factor to Scale AI Factories", Oct 12, 2026. nvidianews.nvidia.com
Cisco Newsroom, companion press release, Oct 12, 2026. newsroom.cisco.com
All About Circuits, "Cisco Unveils ICs for AI Fabrics and Nvidia-Codeveloped USFP Optics Spec", Oct 2026. allaboutcircuits.com
Arista Networks, "XPO: Redefining Pluggable Optics for AI Networking" Whitepaper. arista.com
Arista, HOTI 2026, "12.8T 8×DR8 Liquid-Cooled 64-Channel Pluggable XPO LRO Module". hoti.org
OSFP MSA, "OSFP1600 and OSFP-XD", 2022; OSFP-XD Spec Rev 1.11, Nov 2025. osfpmsa.org
QSFP-DD MSA, Hardware Specification Rev 7.1, Jun 2024. qsfp-dd.com