OCP Global Summit 2026 | Microsoft, Arista | Daniel Mohaghegh, Sunil Priyadarshi | System-Level Evaluation of XPO for AI Scale-Up

6 days ago

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1. Why Microsoft and Arista Presented Together

The pairing is unusual: Microsoft hardware engineer Daniel Mohaghegh and Arista senior director Sunil Priyadarshi shared the stage, one a buyer and the other the system vendor that built the test platform.

Daniel's starting point is clear. Scale-up today is almost entirely single-rack copper. Racks keep getting denser and liquid cooling heavier, mainly to keep the copper interconnect. Moving to optics breaks the physical boundary of the rack, spreading accelerators across racks and rows while keeping scale-up latency low. He said verbally that today's switch chips top out at 512 ports, so a single-tier topology can reach a pod of about 512 accelerators.

We covered where XPO sits among the three paths in OCP APAC Summit 2026: The CPO / NPO / XPO Panel. What makes this talk valuable: a buyer laid out its evaluation process and measured data side by side for the first time.

The question is not whether XPO is dense enough, but whether XPO lets Microsoft postpone the decision on which optics to use.

2. Breaking Down Microsoft's Evaluation Process: Cage First, Optics Later

Microsoft splits the path of a scale-up interconnect technology to deployment into three phases:

Phase 1: Ingredient readiness. Technology prioritization, integration complexity, link performance and power.
Phase 2: System design readiness. End-to-end links, optical device reliability, accelerator/switch/rack design, fiber management, ecosystem and supply chain.
Phase 3: Deployment readiness. Data center installation and operations, RAS, telemetry, firmware and manageability, control-plane and data-plane software.

The slides put each generation at 2-3 years. The problem: the tray has to be designed before the optical technology is settled. Building optics inside the tray would lock in interfaces, form factor and interoperability early.

XPO solves this by splitting the problem in two: the cage and the module. As long as the platform is designed around the cage, whether the module is FRO, LRO or LPO, and which vendor supplies it, can be decided later. A single XPO module carries 64 lanes of 200G for 12.8T; the slides cite 204.8T per 1OU (about 16 modules by STT's math), doubling to 409.6T at 400G/lane, with liquid cooling supporting up to 500 W per module (for 25.6T coherent-lite).

▲ Microsoft compares five accelerator-side optical form factors (pluggable, OBO, NPO, CPO MCM and CPO interposer) on power, design scope, serviceability, blast radius and standardization (Image source: Microsoft, Arista | 2026 OCP Global Summit presentation)

The column that matters most in this table is blast radius: pluggables and OBO replace only the module; NPO with Open CPX also replaces only the module; both CPO variants require replacing the accelerator along with it. A footnote clarifies this refers to hardware replacement cost, not workload impact. The conclusion is blunt: inference bandwidth per SoC does not require deeper integration for 1-2 generations.

3. Breaking Down Arista's Test Platform: 15 dB Is a Deliberately Harsh Channel

To get close to system level, Arista built an XPO emulation box: 4 Broadcom Agera3 retimers with 16 lanes of 212 Gbps each, exercising all 64 module channels; NPC copper flyover cables (32 AWG twinax, Amphenol XPO to Ultrapass-XR) run to the XPO cage, with integrated liquid cooling.

The loss budget for the 300 mm version is itemized in detail:

Segment	Loss (dB)
DSP package	3.00
PCB	5.00
UPXR NPC	0.50
Twin-X cable	3.92
XPO connector	1.00
XPO module	2.00
Total	15.42

▲ Breakdown of the 15.42 dB loss budget for a 300 mm flyover, and how 600 mm and 900 mm flyovers push the accelerator side to 19 and 23 dB (Image source: Simple Tech Trend original; data from Microsoft and Arista, 2026 OCP Global Summit presentation)

The setup uses one end as the switch (fixed 300 mm, 15 dB) and the other as the accelerator, with 300/600/900 mm flyovers corresponding to 15/19/23 dB; an optional 3 dB attenuator on the optical path adds optical stress on top of electrical stress. Sunil described this as close to a worst-case system implementation.

▲ Arista's XPO emulation box: four Agera3 retimers, 64 lanes at 212 Gbps, NPC copper flyovers with integrated liquid cooling, and a 15.42 dB loss budget (Image source: Microsoft, Arista | 2026 OCP Global Summit presentation)

4. Breaking Down the Results: Wherever the Linear Half Sits Decides Who Loses the Margin

First the three module types: FRO has DSP on both ends; LRO keeps DSP only on Tx, with a linear Rx; LPO is linear on both ends. The slides' BER measurement floor is 1e-13.

Pairing (switch / accelerator)	Switch-side BER	Accelerator-side BER
FRO-FRO	~1e-13	~1e-13
LRO-FRO	~5e-12	~1e-13
LRO-LRO	~1e-10	~1e-10
LPO-FRO	~5e-11	~1e-8
LPO-LPO	~5e-9	~5e-9

Values are approximate medians read by STT from the log-scale plot on slide 18, at 15 dB and 0 dB optical attenuation; LRO-LRO and LPO-LPO appear as a single combined distribution in the original chart.

▲ BER of five module pairings over a 15 dB channel: moving the switch side to LPO drops accelerator-side BER from about 1e-13 to about 1e-8 (Image source: Simple Tech Trend original; data from Microsoft and Arista, 2026 OCP Global Summit presentation)

Three takeaways:

FRO is barely affected. With the accelerator flyover stretched to 900 mm, BER rises only from the floor to about 1e-12; adding 3 dB of optical attenuation makes a negligible difference.
LRO is sensitive to optical loss. Without Rx-side DSP, LRO-LRO accelerator-side BER runs about 6e-10 to 6e-9 at 0 dB (300 to 900 mm) and rises to about 1e-8 to 6e-8 with 3 dB of attenuation. Its Rx optical power is closer to spec: median 0.86 dBm on the switch side and 1.47 dBm on the accelerator side.
LPO-FRO's weak point is the LPO Tx. This is the configuration Daniel singled out: linear is easy on switch trays, while fully retimed accelerator trays get more flexibility in module placement and cable length. But the data shows accelerator-side BER of about 1e-8, about 2e-8 with 3 dB added, nearly flat across the 15/19/23 dB flyovers; the slide says it is primarily constrained by LPO Tx, though still within the "acceptable 1e-7 range".

▲ BER distribution of five module pairings at 15 dB / 300 mm: FRO has the most margin, LRO is more sensitive to optical attenuation, and LPO needs Tx tuning (Image source: Microsoft, Arista | 2026 OCP Global Summit presentation)

STT's read: "linear on the switch side" should be read as "linear receive on the switch side". In both cases the switch side drops one DSP, yet LRO-FRO keeps the accelerator side at about 1e-13 while LPO-FRO pushes it back to about 1e-8. The cost is that the switch-side module keeps its Tx DSP and saves less power than LPO, and the talk gave no power figures to quantify the trade-off. Until LPO Tx tuning guidelines arrive, the first XPO scale-up pairing to enter deployment evaluation is most likely FRO on the accelerator side and LRO on the switch side. If retests on the spec 1.0 platform bring LPO-FRO accelerator-side BER back below 1e-10, this call needs revising.

5. Next Steps: From Emulation Box to Switch

The speakers listed concrete next steps:

Make the emulation box compliant with XPO spec 1.0 and retest with updated (beta) modules from multiple vendors, focusing on linear channels.
Arista is building an XPO switch, which Sunil said will be running next month, to validate linear interfaces on it.
Propose an industry-wide single cold-plate temperature so module vendors test at one temperature instead of the full 0-70°C range.
Liquid-cooling connector leakage is still a concern. OFC prototype cold plates showed some leakage; Sunil relayed that one quick-connect vendor ran 5,000 connect cycles without leakage, a verbal second-hand report.

The Call to Action pushes XPO's scope outward: XPO ACC/AEC, OCI optics, coherent optics and external light sources are all on the list. In other words, once the cage is adopted in tray design, what plugs into it need not be an optical module. This echoes ECOC 2026: Fast-and-Narrow vs Slow-and-Wide, Decided at the SerDes on the Chip Edge: XPO uses a standardized cage to box in the electrical side first.

6. Risks and Counterarguments

No power data. The talk compared only BER and SNR, with no watts or pJ/bit for FRO, LRO or LPO, so whether dropping a DSP is worth it cannot be verified.
Prototypes and an emulation box. The data comes from an OFC-era emulation platform and prototype modules; one FRO module ran noticeably hot on optical power (median 6.37 dBm received at the accelerator-side module), and the speakers acknowledged power will become more standardized.
Readings are approximate. The BER values in the table are medians read from log-scale plots, and the slides' loss labels are inconsistent: the setup slide (p.11) and the talk say 15/19/23 dB, while the axes on p.12 and p.14 read 14/18/22 dB; this article uses the former.
NPO is chasing the same slot. In Microsoft's table, NPO with Open CPX also replaces only the module. We covered that path in ECOC 2026: Ciena's Open CPX Turns the 6.4T Optical Engine Back into a Shelf Part; XPO's advantage is front-panel pluggability, its drawback an extra flyover segment in the electrical channel.
The 512-accelerator pod is a verbal claim; the slides say only "multi-rack, multi-row scale-up domains".

7. What It Means for Taiwan's Supply Chain

FIT (Foxconn Interconnect Technology, part of the Hon Hai group) is on the XPO MSA core member list. XPO's cage, connector and cold plate are the foundation of this argument; designing the tray around the cage means mechanical parts get locked in before the optics.
Test methodology becomes a new source of value. Microsoft's Call to Action asks for common system-level test methods and metrics, and Arista proposed single-temperature cold-plate testing. Whoever first offers 64-channel, multi-flyover-length, optical-attenuation-capable testing can secure a position in module qualification.
Module makers need three versions ready. With the cage fixed and modules swappable, one customer may evaluate FRO, LRO and LPO in parallel. On this core member list, FIT is the only Taiwanese company STT can confirm; Taiwanese optical module makers wanting in will first have to pass this multi-pairing system-level validation.

8. Summary

The significance of this talk is that Microsoft redefined XPO in a buyer's language: not a CPO substitute, but an interface that decouples tray design from optics selection. As long as inference workloads need no deeper integration for 1-2 generations, that decoupling is worth more than CPO's power advantage.

But Arista's data also spells out the cost: wherever the linear half sits, the opposite link loses the margin. LPO on the switch side costs the accelerator side about 5 orders of magnitude in BER, while LRO on the switch side costs the accelerator side almost nothing, only lifting the switch side from the floor to about 5e-12. Over the next 6-12 months, watch three things: retest data on the spec 1.0 platform, linear-link performance on Arista's XPO switch, and when LPO Tx interoperable tuning guidelines arrive.

Cage first, optics later is Microsoft's most pragmatic bet on scale-up optics; but on "fully linear on the switch side", the data has not given an answer yet.

This article is for technology and industry trend analysis only and does not constitute investment advice.