As copper can no longer keep up with the data movement demands of AI clusters, Marvell answers with its Photonic Fabric optical platform. This is not just a speed upgrade, but an architectural shift that breaks through the memory wall and the power bottleneck.

850 nm is being pushed off the AI scale-up shortlist not because of speed but because of junction temperature. Moving to 1060 nm isn't swapping a die — fiber, PD, packaging and standards all have to change together.

An 850nm VCSEL that passed a 20-year, 100G production spec failed after 1,600 hours in scale-up rack thermal conditions, while a 1060nm device under identical conditions ran 5,000 hours unscathed. At ECOC 2026, Lumentum used one chart to show the VCSEL bottleneck was never speed—it is heat.

Scoring three architectures on the same criteria, Ciena shows single-vendor CPO going from second-best to best on technology, but from efficient to at-risk on supply chain, because the ASIC and interconnect are sold as one unit. Open CPX's answer is not a better component but a socket that optics and copper share, and a spec written in under six months.

On the same day and at the same wavelength, Lumentum said OM3 and OM4 can't be used at 1060nm, while Berxel ran 100 meters of OM3. The number that really matters from this talk is ±22 µm: it downgrades optical packaging from precision alignment to simply placing the part.

Token demand wants 10x a year while supply delivers only 2x, and the compounding 5x gap can only be closed by architecture. Ayar Labs CEO Mark Wade's key line at OCP APAC wasn't about CPO but this: the unit of adoption shrinks from a whole rack to a single chassis.

Scale-across planning has shifted from "how many wavelengths do I need" to "how many fibers do I need", because regenerator sites can no longer supply the power to light that many fibers. Acacia mapped the whole optics landscape onto four scales in a seven-step chart, and the 400G/lane physics line is now setting the handover timeline for campus DCI.

OIF's requirements document isn't a spec — it's system vendors laying out what they actually want. The real battlefield is pJ/bit, and BEI, with short reach and loose interoperability, is the sweet spot that ramps first and tolerates the most aggressive designs.

Five NVIDIA publications are not isolated research but one vertically integrated weapon, deliberately split into four layers. STT merges them into a single technology map: how far this optical interconnect stack is from volume production, and what shape it bends the supply chain into.

Meta, Broadcom and AMD jointly define the OCI 200G line interface spec, betting scale-up optical interconnect on micro-ring DWDM, bidirectional single fiber, external lasers and NRZ. It is a buyer-supplier alliance taking on NVIDIA's vertical integration, and its external laser clause draws a clear spec for CW DFB and ELSFP suppliers.

Optical interconnects are moving from the lab to the factory. NVIDIA and Lumentum have built the first production-ready DWDM laser array, with 7.2% wall-plug efficiency and per-channel power held within ±0.8 dB. More importantly, system-level simulation quantifies what actually drives optical link cost, as copper's ceiling makes the alternative an economic necessity.

Past 224G/lane, copper reaches only one meter, and China's lack of high-end DSPs has turned NPO from a "stopgap" into a durable form that will coexist with CPO. Eleven talks, hundreds of hard numbers, and the dissenting views from H3C and Marvell, all pointing at the 2027 volume window.