Bandwidth is per-lane speed times lane count. Push speed and you hit the SerDes energy floor; push lane count and you hit fiber and connector cost. The new fact this year: the second wall arrived first.

Today a rack draws 120 kW; the next generation will exceed 0.5 MW. At ECOC 2026, Microsoft asked a true customer's question: if optics were cheap enough, why keep this architecture? The answer came as a five-number spec sheet, plus a declaration that the die, not the package, is now the unit of design, assembly and failure.

On the surface, Microsoft's keynote showcased in-house silicon; underneath, it publicly moved the AI infrastructure bottleneck from accelerators to power, cooling and networking. For Taiwan's supply chain, Microsoft's own "70% of components come from Taiwan" is an entry ticket, not a moat: the money is flowing to system-level co-design.

As AI models head toward Yottascale, optical interconnect architecture faces an unprecedented shift. From soldered to socketed, from external lasers to optical backplanes, how are Meta, AMD, Microsoft and other giants defining the next AI interconnect standard?

As NVIDIA GPU rack power soars from 120 kW to 600 kW, interconnect technology faces a sweeping overhaul. From Andy Bechtolsheim's XPO vision to Dave Welch's THz dielectric waveguides, who will survive the 1.6T/3.2T race?