OFC 2026: Samsung Foundry Takes Its 300mm Silicon Photonics Platform to Volume Production, Targeting HPC and AI

As AI compute demand explodes in 2026, interconnect efficiency has become the bottleneck in the data center. At this year's OFC, Samsung Foundry unveiled the latest progress on its 300mm (12-inch) silicon photonics (SiPh) platform. This is more than a spec sheet: it is a direct challenge from Samsung to TSMC and GlobalFoundries in the HPC and AI segments of the global foundry market. Samsung stressed its ability to deliver a "one-stop solution" from PIC all the way to CPO, and the move to 12-inch wafers substantially improves both capacity and cost efficiency.

Core Technology Breakdown: From 12-Inch Process to Best-in-Class Power Efficiency

The centerpiece is Samsung's 300mm SOI (Silicon-on-Insulator) platform, built on a 305 nm top silicon layer and a 2 μm buried oxide (BOX), and optimized for O-band operation.

1. Key Process Metrics and Component Performance

Using 12-inch DUV immersion lithography, Samsung has shrunk the minimum line spacing to ~60 nm, which is critical for grating coupler precision.

• Propagation loss:

  • Si strip waveguide: 1.4 dB/cm.

    
    

  • Si rib waveguide: 0.7 dB/cm.

    
    

  • SiN waveguide: 0.4 dB/cm. Samsung disclosed that its silicon nitride (SiN) uses a PECVD process, with loss now approaching best-in-industry levels.

    
    

• Optical I/O: 1D/2D grating couplers perform well at 1310 nm. The 2D Si GC was optimized via inverse design to maximize coupling efficiency and cut polarization-dependent loss (PDL ~0.2 dB).

  
  

2. Active Devices and 224 Gbps Measurements

Samsung showed a strong lineup of active devices, developed specifically for 1.6T and 3.2T data rates:

• MZM (Mach-Zehnder Modulator): bandwidth above 50 GHz, with a successful 224 Gbps PAM4 transmission demo.

  
  

• MRM (Micro-Ring Modulator): offered in two PN-junction designs, "high bandwidth" and "high modulation efficiency", with modulation efficiency reaching 55 pm/V.

  
  

• Photodetector: the high-speed germanium (Ge) PD delivers >50 GHz bandwidth in its standard form; a narrow-width design pushes it past 100 GHz.

  
  

Packaging and Timeline: Heading Toward 2 pJ/bit

Samsung's silicon photonics roadmap lays out a clear path from pluggable optics (PO) to co-packaged optics (CPO):

Metric / Year	2025 (PO)	2027-2028 (OE on Substrate)	2030 (CPO Turnkey)
Power efficiency	10 pJ/bit	5 pJ/bit	2 pJ/bit
Per-lane bandwidth	100G / 200G	200G / 400G	400G+
Key technology	GC / Pluggable	TCB, 25 μm pitch	HCB, 10 μm pitch / TSV

Samsung is currently developing a highly cost-effective optical engine based on TCB (Thermal Compression Bonding), and plans to launch a next-generation CPO turnkey solution based on HCB (Hybrid Copper Bonding) in 2029-2030.

PDK Capabilities: Accelerating EPIC Co-simulation

Samsung's SPX1 PDK is integrated into industry-standard EDA tools such as Cadence and Synopsys and supports more than 40 Si-verified components. Its physics-based compact models accurately predict MRM self-heating and optical peaking effects, which is critical to first-pass success on large electronic-photonic ICs (EPICs).

Supply Chain and Market Impact: Samsung's "Take It All" Strategy

Samsung sent a strong signal in this talk: it is not content to be just a foundry.

1. One-stop supply chain: Samsung is leveraging its in-house HBM memory, XPU logic and SiPh platform to offer an end-to-end CPO service.

   
   

2. Process advantage: moving from 8-inch to 12-inch is not only about capacity; it also enables TSV (through-silicon via) integration for 3D stacked packaging.

   
   

3. Competitive landscape: while Samsung's SiN loss numbers are impressive, it is still taking a cautious approach on edge couplers, co-developing them with an R&D center. That suggests laser coupling at very high bandwidth remains an open challenge for the industry.

   
   

The Simple Tech Trend View

The maturity of Samsung's 300mm SiPh platform marks the year silicon photonics officially entered 12-inch volume production. SiPh was long treated as a "niche market" for fabs, but with AI data centers now hard-requiring 2 pJ/bit power targets, silicon photonics has become must-win territory for the major foundries.

What we expect over the next 12-24 months:

• 1.6T modules become the main battlefield: Samsung's 224 Gbps MZM demo shows it can already supply 1.6T-class modulators.

• Packaging beats process: the HCB (Hybrid Copper Bonding) Samsung mentioned is what will decide the winners after 2028, directly shaping how efficiently HBM and optical engines can be integrated.

• Cost competition: the scale economics of 12-inch wafers will put heavy margin pressure on foundries that only have 8-inch lines. Samsung is using its vertical integration across logic and memory to try to reshape the CPO business model.