With 512K-GPU clusters becoming the norm for AI factories, copper is hitting its limits. An OFC 2026 panel showed how CPO delivers a 3.5X efficiency gain, and how the 12.8T XPO rewrites the switch-density game.

When does copper run out? At OFC 2026, Meta answered with 90 million device-hours of field data: CPO cuts link power by 65% and, excluding one fixable component issue, is more than 10x more reliable than pluggable modules.

AI compute is growing 2.5X a year and electrical switching is hitting its limits. An OFC 2026 workshop showed how optical circuit switching (OCS), with its low latency and low power, is becoming a core technology for NVIDIA and the hyperscalers building next-generation AI supercomputers.

Conventional EDA is hitting a bottleneck when simulating silicon photonics. At OFC 2026, GF and Cadence presented photonic-native modeling built on waveguide scattering physics, delivering 2x faster simulation and paving the way for large-scale electro-photonic integration in the 1.6T era.

As AI training outgrows a single site, Scale Across is the new normal. How Meta defines the next generation of interconnect, why Google says "fiber is the new wavelength," and the strategy behind Lumen's push to add 41 million fiber miles.

Silicon photonics interconnects are hitting an inflection point. At OFC 2026, GlobalFoundries showed how detachable connectors and 3D packaging tackle the 100+ fiber assembly challenge in AI inference, while building a complete US-based optical packaging ecosystem.

In the era of gigawatt AI factories, the network defines the computer. NVIDIA unveiled 3D-stacked silicon photonics CPO and industry-leading MRM technology to break through the power and reliability limits of AI scaling, and laid out a decade-long roadmap fusing compute and optics.

Copper's physical limits have become the bottleneck to scaling AI. At OFC 2026, Broadcom showed its latest CPO and OCI progress - ultra-low 6 pJ/bit power and exceptional reliability - signaling that optics will dominate both scale-out and scale-up networks.

The AI compute race has entered its second half, and bandwidth and power are now make-or-break. Intel's OCI chiplet at OFC 2026 signals that the convergence of photonics and electronics at the chip level has arrived, rebuilding data center architecture rather than merely improving specs.

A major step for CPO external laser sources: at OFC 2026, Furukawa Electric showed an 8-channel TOSA delivering up to +25 dBm per channel, using a long-cavity design to solve high-power thermal limits and pave the way for 1.6T switch deployments.

At OFC 2026, STMicroelectronics launched its PIC100 platform, using a unique backside integration process to break the physical limits of the buried oxide layer. It delivers ultra-low-loss edge couplers and 80GHz photodetectors, signaling that 200G/lane silicon photonics has officially reached volume production.

Silicon photonics leader Lightmatter unveiled microring-based 800G/1.6T interconnect technology at OFC 2026. It tackles thermal compensation in AI compute environments and, through 3D-stacked packaging and integration with the TSMC/ASE ecosystem, marks a new milestone for silicon photonics commercialization.

The 400G-per-lane era is here. At OFC 2026, Coherent showed InP components with more than 100 GHz of bandwidth - but how do you keep TDECQ low while absorbing a 5 dB sensitivity penalty? A deep dive into the technical and commercial tradeoffs of IM/DD for AI interconnects.

At OFC 2026, NVIDIA unpacked the design core of single-lane 200Gb/s silicon photonics microring modulators. We break down 3D IC integration, inductive peaking and PN junction trade-offs - the key technology path for CPO interconnects in AI factories.

Tackling both the power and capacity bottlenecks of GPU scale-up, Lumentum taps the mature 3D sensing and LiDAR supply chain to redefine high-density interconnect with 1060nm VCSEL arrays.

Who says an MZM has to be long? At OFC 2026, Zhangjiang Laboratory used the slow-light effect to shrink a modulator to 500 microns and reached an impressive 400 Gbps per lane without relying on AI algorithms.

Can a VCSEL go 2 km? At OFC 2026, Furukawa Electric showed an ultra-compact 800G CPO transceiver that uses 1060-nm single-mode VCSELs to hit 4.1 pJ/bit over standard single-mode fiber, challenging silicon photonics in AI interconnects.

Packaging and test account for up to 80% of silicon photonics cost. At OFC 2026, FormFactor showed a fully automated measurement platform using its Pharos lens and 3D beam algorithms to sharply improve wafer-level test repeatability and efficiency for AI data center interconnects.

Three scale-up MSAs launched at OFC 2026, and the loudest, XPO, was championed by Arista co-founder Andy Bechtolsheim. But Meta's 90 million hours of data took apart its core selling point. Is XPO a bet on extending pluggables' life, or the real answer?

AI compute demand is forcing Ethernet to evolve faster than ever, and OFC 2026 marked the official start of 400G-per-lane work. Experts from Meta, Cisco, Synopsys and Dell'Oro explain how 1.6T and 3.2T networks will scale under hard power and space limits.