Computex 2026 Keynote: The Copper Wall Is Moving Into the Rack — Marvell Spells Out the Physical Timeline for Optics

2 days ago

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Jensen Huang declared that "compute has been disaggregated"; at Computex, Matt Murphy supplied the missing physical timeline — AI's next bottleneck isn't compute or memory, it's connectivity. And the deciding factor for connectivity is a "copper wall" moving into the rack: every doubling of bandwidth halves copper's reach, so at 400G/lane copper can't even span one rack, and physics forces CPO from PowerPoint into shipments. The endgame is a "data center without distance."

1. A Three-Leg Relay: Compute → Memory → Connectivity

Matt Murphy opened with a question: what actually defines the performance of AI infrastructure? The instinctive answers are GPUs, process nodes (3nm, 2nm, A14/A16), or memory bandwidth. Murphy's answer: all of these matter, but none is decisive, because "no single processor is fast enough — you need tens of thousands, eventually millions, of processors working together like one giant engine." Getting that many to work in concert is, at its core, a connectivity problem.

He laid out the bottleneck relay of recent years clearly: first compute, with NVIDIA leading that leg and becoming the world's first $5 trillion company; then memory, with HBM makers expanding aggressively and three memory companies recently crossing $1 trillion in market value; now the baton has passed to connectivity.

That gives Marvell a different position from everyone else. Others are compute-first or memory-first; Marvell is connectivity-first — data center is more than 75% of revenue, and the vast majority of that comes from connectivity. Murphy calls Marvell "the Switzerland of the industry," working closely with both compute and memory vendors. Seen against NVIDIA's $2 billion investment in Marvell and the two companies' expanded optics/photonics/NVLink Fusion collaboration, that positioning carries even more weight — we tracked this thread in the week Marvell and NVIDIA locked in CPO's first commercial year (W23).

2. The Physics of the Copper Wall: A Quantified Timeline

Murphy turned "optics replaces copper" from a slogan into a physical curve you can calculate.

The core law fits in one sentence: copper's reach is inversely proportional to bandwidth. Every time bandwidth doubles, reach is cut in half. Then he laid out the numbers:

Today's fastest production systems run at 200G/lane, with a copper cable length limit of about 2.5 meters.
One step back, at 100G/lane, copper could stretch to about 5 meters.
A rack is about 2 meters tall; after internal routing, 2.5 meters sits right at the limit.
Once you move to 400G/lane, copper can't even fully connect a single rack.

The conclusion is that the wall is moving: the copper wall is shifting from "between racks" to "inside the rack". And the crucial multiplier: every step the wall moves, the number of connections needed rises by at least an order of magnitude (×10), because there are far more processors to connect inside a rack than between racks. That is the physical basis for the coming explosion in optical demand — not anyone's preference.

Murphy also noted that we've seen this movie before: 20 years ago data centers ran at 10G entirely over copper, with optics used only for telecom-grade long haul. Then the wall moved, power-optimized data center technologies like PAM4 arrived, and today every hyperscale data center is fully optical. History is about to repeat itself at rack scale. This timeline also echoes the 200G threshold we flagged in CPO's first commercial year officially kicks off — TSMC COUPE volume production and the 200G EML bottleneck.

3. CPO Is the Answer — But It's Genuinely Hard

When the wall moves into the rack, the answer is CPO (co-packaged optics) — bringing optical connectivity all the way to the package edge, right next to the compute or switch chip. Murphy pointed out that what CPO really solves is density and power: there are roughly 10× as many connections inside a rack as between racks, and forcing that through today's standard optical modules and cables would neither fit in the space nor stay within the power budget — "it's simply impossible."

It's hard because it crams several of the industry's most advanced technologies into one tightly coupled small system: leading-edge CMOS, silicon photonics, advanced packaging, and optical interconnect. CPO has never been won or lost on the optics themselves, but on whether packaging can integrate these heterogeneous parts at high yield — an argument we broke down in detail in CPO is won in packaging, not optics (John Lau on PIC/EIC heterogeneous integration).

Murphy staged a vivid side-by-side on the spot: on one side, a newly announced conventional 100T Ethernet switch — chip in the center, copper traces carrying signals to the front panel, optical modules plugged into the panel; on the other, a 51.2T CPO switch, again with the switch chip in the center, but with 16 × 3.2T optical engines arranged around the chip's edge, fibers attached directly to the engines, the copper traces on the PCB gone entirely, and light coming straight out of the package. This isn't the future tense — it's happening now.

4. The Full-Reach Optical Map: Marvell's One-Stop Shop

Murphy split AI infrastructure into four segments by distance, each with entirely different technologies, teams, and even supply chains:

Between data centers (hundreds to thousands of km): coherent modulation and coherent DSPs, paired with Marvell's fourth-generation silicon photonics (in volume production for ten years) and SiGe analog components. Later this year it will sample the world's first 1.6T, 2nm coherent solution.

Inside the data center (hundreds of meters): power-optimized PAM4 instead, with 1.6T 3nm PAM4 ramping since last year; Ethernet switches have scaled from 12.8T to 51.2T, and at Computex Marvell unveiled the lowest-power 100T switch.
Inside the rack: still copper's domain, relying on electrical SerDes — 200G today, with 400G already demonstrated.

Inside the package (millimeter scale): die-to-die SerDes plus 2.5D/3D advanced packaging.

Marvell's pitch: from millimeters to kilometers, it has product at every hop — the industry's only "one-stop" connectivity supplier. This map was built with $36 billion spent over ten years, including Inphi (data center connectivity) and the recent Celestial AI (photonic fabric) and XConn (scale-up switching). We broke down how Celestial AI's photonic fabric redefines SoC I/O in our HOT CHIPS 2025 piece. Add NVLink Fusion — which "fuses" NVIDIA and Marvell technology into customers' semi-custom chips — and Marvell effectively sits at the intersection of the NVIDIA camp and the in-house ASIC camp.

5. The Endgame: A "Data Center Without Distance"

Finally, Murphy pulled the lens out ten years: once connectivity is almost entirely optical, distance is no longer a constraint — a profound shift. Today's server, rack, and data center architectures are all designed around the constraint of distance; software workloads are forced into chunks small enough to fit in a scale-up cluster.

Once distance disappears, architecture can be rewritten: scale-up domains expand from today's 72/144 XPUs to more than 1,000 with all-optical interconnect; compute and memory can be split into independent pools and dynamically composed per workload, no longer bound by CPU:XPU ratios fixed at the factory with inevitable idle waste. The vision in one sentence: architecture defined by what the model needs, not by the limits of the interconnect.

6. The Necessary Cold Water

First, copper won't die — and it will be used for a long time. Jensen said so himself on stage: use copper wherever you can, for as long as you can, and both copper and optics will be used in enormous volume over the next 5–10 years. The transition is gradual and use-case by use-case, not an overnight 0/1 switch. Reading this as "copper is finished" gets the timing wrong.
Second, CPO serviceability and field yield have not yet been validated at scale. Once the optical engine is co-packaged with the ASIC, how you replace a failure is still a question that hasn't been answered by long runs in real data centers.
Third, "one-stop" is a selling point, but every segment is a head-to-head fight. In switches there's Broadcom, and every reach segment has its own rivals; Marvell's full-reach map looks good, but every cell is close-quarters combat. And Murphy's own line — "you don't get there with PowerPoints, demos, and press releases; customers want something manufacturable, reliable, and deployable now" — is a reminder in reverse: many of the CPO announcements on the market are still at the demo stage.

7. What It Means for Taiwan's Supply Chain

The keynote specifically brought ASE CEO Tien Wu on stage, and the signal was clear: advanced packaging is where CPO will be decided — and that is Taiwan's home turf. Tien Wu's remarks captured the hard-to-replicate strength behind Taiwan: betting capex 10 years ahead of demand; 40 years of accumulation from PCs, wireless, mobile, and data centers through to HPC; and the cluster efficiency of 350,000 semiconductor workers plus 1.1 million high-tech professionals.

Connect the physics to the supply chain and the logic closes: the copper wall moves into the rack → connections ×10 → optical modules, silicon photonics, advanced packaging, CW lasers, and electrical SerDes all ramp. For Taiwanese companies, the real question isn't "will optics win," but who can get into the BOM of CPO optical engines and advanced packaging.

The keynote's real contribution was turning the "when" of CPO from a matter of faith into a matter of physics: the day the copper wall moves into the rack is the day the optical supply chain gets reshuffled — and both Marvell and ASE are telling you that day isn't far off; it's in the ramp of the next year or two.

This article is for technology and industry trend analysis only and does not constitute investment advice.