OCP Global Summit 2026 | Ciena | Peter Winzer | OpenCPX: A Standardized Pluggable NPO Socket Family
1. From ECOC to OCP: Same MSA, a Different Pitch
Last month at ECOC we wrote ECOC 2026: Ciena Uses Open CPX to Turn the 6.4T Optical Engine Back into Off-the-Shelf Parts, focused on the open ecosystem: turning the optical engine from a custom part locked to a switch ASIC into a pluggable, replaceable, multi-vendor standard component.
This time Winzer spoke for only 11 minutes at the IPEC Workshop at OCP, but the center of gravity clearly moved. He first acknowledged the familiar CPO/NPO benefits: power, latency and jitter, reliability, link flaps. Then he added: what really gets overlooked is tray and rack density.
The slide comparison is blunt: front-panel pluggables deliver "50 to 200 Tbps per OU", while CPO/NPO moves "toward Pbps per OU". Put differently, at ECOC Open CPX answered "who supplies it"; at OCP it answers "why you have to switch".
ECOC was about openness, OCP was about floor space; the latter is the kind of argument that gets hyperscalers to sign.
2. Breaking Down the Faceplate: 70 Tbps vs 624 Tbps in 1OU
Winzer's logic: with liquid cooling now mainstream, packing several switch chips into one tray is no longer a thermal problem but an I/O escape problem. A single 51.2T switch already fills the front panel with OSFPs; getting 400 Tbps out of a 1U box is impossible with any pluggable available today.
Ciena listed front-panel capacity for a 1OU tray at 200G/lane:
Faceplate option | 1OU capacity | Multiplier headroom |
OSFP pluggables | 70 Tbps | None |
XPO with fly-over copper | 200 Tbps | None |
Copper connectors | 230 Tbps | x2 (bidi) |
Mini optical connectors (co-packaged I/O) | 624 Tbps | xN (bidi, WDM) |

▲ Front-panel capacity at 1OU and 200G/lane: OSFP 70 Tbps, XPO 200 Tbps, copper connectors 230 Tbps and mini optical connectors 624 Tbps (Image source: Simple Tech Trend; data from Ciena's 2026 OCP Global Summit presentation)
The key point in this table is that 624 Tbps is still a single-wavelength DR figure, before bidi or WDM. In other words, co-packaged I/O has not even started using its multipliers. Conversely, XPO is the densest option in the pluggable camp, yet on Ciena's table it lands exactly at one 200T switch, with no room for a second.
3. Switches Don't Produce Tokens: Breaking Down Floor Share
This was the weightiest slide of the talk. Ciena set up a scenario: 524,288 XPUs at 8 Tbps each, with a two-tier scale-out network requiring 61,440 x 200T switches (1,024 x 200G). Then it asked how much data-center floor the switch racks consume, depending on XPUs and switches per tray:
XPUs per tray | 1 switch | 2 switches | 3 switches | 4 switches |
4 | 32% | 19% | 14% | 10% |
6 | 41% | 26% | 19% | 15% |
8 | 48% | 32% | 24% | 19% |

▲ In a 520,000-XPU data center, the switch racks' share of floor space falls as switches per tray increase: at 4 XPUs per tray it drops from 32% to 19%, 14% and 10% (Image source: Simple Tech Trend; data from Ciena's 2026 OCP Global Summit presentation)
With today's common configuration (4 XPUs per tray, one 200T switch per switch tray), nearly a third of the data center is switches. Two per tray brings that to 19%; three brings it to 14%. The denser the XPUs, the heavier the switch burden: at 8 XPUs per tray with one switch, switches take 48%.
The significance: it reframes the value of CPO/NPO from "how many pJ saved per bit" to "how many more XPUs per square meter". In AI campuses capped by both power and land, the latter converts to revenue far more easily.
4. Copper Plugs In Too: Nitro ACC Stretches Scale-Up Across Three Racks
Open CPX is often treated as an optics spec, but Winzer spent half his opening on copper. His reason: retimer-free mixed media is what lets scale-up domains grow.
Ciena's own Nitro analog redriver numbers at 200G PAM4:
200G PAM4 | Reach | Power |
Passive copper DAC | 1.5 m | 0 pJ/bit |
Retimed copper AEC | 4.5 m | 11 pJ/bit |
Active copper ACC (Nitro) | 3.5 m | 1.5 pJ/bit |
ACC gives up 1 meter versus AEC but uses roughly one-seventh the power (Winzer said "almost 10x" orally), and handles 70 dB of channel loss at 53 GHz. Applied to rack layout: the scale-up domain grows from a single rack of 72 XPUs @ 14 Tbps to 256 XPUs @ 25 Tbps across three racks, with 23% of links on passive copper and 77% on active copper, for a scale-up power adder of about 1 pJ/bit.
The key here: the same Open CPX socket can take ACC copper today and a linear optical module tomorrow, without changing the board. That is also why Rev 1.1 formally adds copper media to the spec.
5. Socket Spec: Type 1/Type 2, ILM/ELM and XPO-ELS
Rev 1.0 defines a 6.4T and 7.2T (32 or 36 lanes of 200G) pluggable interface, with no compression hardware: the socket simply snaps in. Two socket types:
Type 1: smaller, with RF and power/control on separate mounting planes, suited to true CPO where RF mounts directly on the package substrate.
Type 2: a single pin field with everything in one socket, suited to NPO-class applications that do not need two mounting planes.
Both accept ELM (external laser modules) or ILM (integrated laser modules); the latter are larger.

▲ Open CPX's two sockets and two modules: Type 1 and Type 2 sockets that accept either an external laser module or an integrated laser module (Image source: Ciena | 2026 OCP Global Summit presentation (7:26))
With today's modules you can build a 51.2 Tbps XPU (split between scale-up and scale-out as you like) and a 204.8 Tbps switch. Winzer stressed these are sampling now, not future tense.
The old knock on external lasers is that light sources fill the front panel. Ciena's answer is an external laser in the XPO form factor (Winzer called it EL-XPO): in-module liquid cooling and high thermal capacity, so one XPO-ELS can feed 10 to 20 Open CPX modules. External-laser designs can therefore fit two 200T switches per tray (three is the vision), while integrated-laser designs, with larger modules, probably fit only one.
The 6.4T external-laser module shown measures 30 mm x 16 mm; Ciena's own 6.4T engine (called Vesta orally) meets TP2 with margin at a 15 dB user link budget, and the slide eye diagram shows TDECQ of 2.23 dB and outer extinction ratio of 4.08 dB.
6. Roadmap: A New Rev Every Six Months, 400G/lane by 2028
The Open CPX MSA was founded in March 2026 and published Rev 1.0 six months later on September 16, the same month it topped 50 members (Winzer said orally it is now above 60). Next:
March 2027 (OFC): Rev 1.1, still 32/36 x 200G, adding copper media and a Type 3 socket
June 2027: Rev 2.0, 64/72 x 200G (12.8T/14.4T), socket type(s), ILM/ELM, copper
Late 2027 to early 2028: Rev 3.0, N x 400G, with N not yet defined

▲ Open CPX MSA timeline: Rev 1.0 in September 2026, Rev 1.1 in March 2027, Rev 2.0 in June 2027 and Rev 3.0 in late 2027 to early 2028 (Image source: Ciena | 2026 OCP Global Summit presentation (10:14))
Sockets are currently supplied by Samtec and Molex, and modules are sampling from Coherent, TeraHop, Ciena and Intel. Asked whether 400G/lane will still be silicon photonics, Winzer answered that it is "feasible, but it depends on who makes it and how".
7. Risks and Counterarguments
The floor-space math's assumptions are not disclosed. 32% to 19% depends on trays per rack, cooling layout and network topology; Ciena gave results, not methodology. A different topology (for example more scale-up, less scale-out) changes the ratios.
Three switches per tray is a vision. Winzer himself said "three might stretch it"; two is the credible near-term target.
ELS becomes a new single point. One XPO-ELS feeding 10 to 20 modules enlarges the blast radius of a laser-source failure, and reliability data is not yet public.
Standards are not shipments. Rev 1.0 to Rev 3.0 spans less than 18 months; that pace raises version-compatibility risk, and buyers may wait for Rev 2.0 at 12.8T before volume adoption.
The adopter list matters more than the member list. With 50-plus members, the MSA's weight ultimately depends on whether major GPU and switch platforms adopt the Open CPX socket; for the market view see CPO Is Finally No Longer "Crying Wolf".
8. What It Means for Taiwan's Supply Chain
Taiwanese firms are on the member list, not yet on the socket supplier list. Member logos on the slide include Taiwanese or Taiwan-affiliated companies such as Accton, Alpha Networks, BizLink, FIT (Foxconn Interconnect Technology) and LOTES; but the only socket suppliers Winzer named were Samtec and Molex. LOTES and FIT both have volume CPU-socket experience, and the Rev 1.1 Type 3 and Rev 2.0 sockets are their entry windows.
Doubling switch-tray density is a design problem for white-box switch makers. Two 200T switches in 1OU, liquid cooling and external-laser XPO mean the tray's mechanics, thermals and routing are all redone; switch ODMs such as Accton and Alpha Networks sit right in front of that problem.
ACC copper is incremental volume for cable assembly. With scale-up spanning three racks and 77% of links on active copper, it is a new product line for cable assemblers; BizLink is a member, so watch for when ACC shows up in revenue.
External lasers and ELS are an opportunity for laser-source makers. With one XPO-ELS feeding 10 to 20 modules, laser power and reliability requirements both rise; for more see NPO Is Not an Appetizer for CPO.
9. Conclusion
What mattered most in this OCP talk was not a new spec but a new pitch that buyers can put a dollar figure on: faceplate from 70 Tbps to 624 Tbps, trays from one switch to two, switch floor share from 32% to 19%. That math sits much closer to how hyperscalers decide than pJ/bit does.
On timing, 6.4T/7.2T sockets and modules are sampling today, but the real volume inflection is Rev 2.0 (12.8T) in June 2027. Three things to watch over the next 12 months: who supplies the Rev 1.1 Type 3 socket, reliability data for XPO-ELS, and whether Nvidia or Broadcom switch platforms adopt the Open CPX socket.
Switches don't produce tokens; whoever lets a data center deploy fewer switches gets to sell more XPUs.
This article is for technology and industry trend analysis only and does not constitute investment advice.




Comments