CPO Is No Longer “Crying Wolf”: Six Real Signals from the LightCounting CPO/NPO Conference
LightCounting's second CPO/NPO online conference was packed, peaking at more than 1,200 concurrent attendees — a record for the firm. That number alone is an industry thermometer.
The theme of the event wasn't “which technology is coolest” but “which solution can reliably ramp to millions of units.” Deployment beats innovation — every speaker agreed.
The standards battlefield has already split into roles: the OpenCPX MSA is going after the form factor, OIF is playing the long game, IPEC is racing for speed, and OCP is acting as the system-level conductor — four efforts moving in parallel rather than converging.
NPO, CPO and CPX are not zero-sum; they will coexist. NPO is the pragmatic workhorse in the near term, and CPO is the endgame.
The biggest wildcard in the enabling-technology session was “wide and slow” NRZ optics (micro-LED, VCSEL), aimed at short-reach scale-up with the goal of bringing cost and power down to the same tier as copper.
NVIDIA's Gilad Shainer closed the event with the line that settled it: “Anyone who says CPO is still two years away should go back two years” — CPO is already in volume production.
1. Why now: AI scale-up is pushing the optical engine right next to the compute core
For the past decade, CPO has been treated as the technology that is “always two years away.” What makes this conference different is that the physical reality on the demand side has changed.
The driver is AI scale-up. Coherent's Justin Abbott named the core trend in his opening: move the optical engine toward the compute core. Pluggable optical modules are still evolving to keep up with AI demand, but power and density hit a physical ceiling — and that is exactly where CPO/NPO come in: shorten the electrical channel, drop the DSP for lower power, trade higher integration for bandwidth density, and ultimately drive down cost per bit.
NVIDIA, closing the event, put it most plainly. Gilad Shainer noted that scale-out network bandwidth doubles every generation, while scale-up bandwidth demand is 10x that of scale-out; as scale-up expands from a single rack to multiple racks, stacking hundreds or even thousands of GPUs, the volume of optics and its power draw become numbers you can't ignore. He ran the most direct math: optical networking already consumes about 10% of compute capacity in scale-out infrastructure, and compute capacity equals how many tokens you can produce, and tokens equal money — every bit of optical power saved can be turned into more GPUs, more tokens and more revenue. That is the answer to “why now.”
We broke down this pluggable → NPO → CPO migration path in detail in The Great Optical Packaging Transition (Part 2): CPO's Three-Stage Evolution; this conference essentially retold that path with an entire evening of real hardware data.
2. The real storyline was deployment, not technical showmanship
If you take away only one line, make it Justin Abbott's: “Innovation alone doesn't determine adoption.”
When hyperscalers evaluate these technologies, performance is table stakes — it's assumed. What really matters are four deployment questions: Is it reliable (it has to survive 5 to 7 years in the field)? Is it serviceable (CPO/NPO are inherently harder to swap than pluggables)? Does manufacturing have enough margin to hold up at million-unit volume? Can you actually trust it in the field? The preliminary hardware data Coherent showed — 32 channels running stably, the TP2 performance target met, and an industry that has roughly converged on 16 dB of electrical channel loss — is not about “how fast it runs” but about “starting to turn simulation into verifiable confidence for volume production.”
The InnoLight (TeraHop) speaker hit this point hardest. He stressed that hyperscaler deployments have “no such thing as a gradual ramp” — once a technology is adopted, volume jumps from very low to millions of units almost instantly, an environment that is extremely unfriendly to new technologies without a track record. Their trump card: field reliability data from nearly 100 billion device hours of silicon photonics — truly low FIT rates never come from small batches of lab samples, only from massive field deployment. That is why “evolving up from the huge pluggable optics base” was emphasized again and again: those optical engines and that silicon photonics are already running in the field, and the data itself is the moat.
3. The standards battlefield: OpenCPX, OIF, IPEC and OCP each take a corner
The conference laid out the 2026 standards map, with four forces and a clear division of labor:
OpenCPX MSA (Session 1) — going after the form factor and the ecosystem. Driven by founding members including Coherent, Ciena, Samtec and InnoLight, its pitch is “a standardized physical module + off-the-shelf building blocks”: reuse DR optical specs, 200G electrical specs and CMIS management; define type 1 / type 2 sockets, mechanical dimensions, and RF and power pinouts; and use a liquid-cooled cold plate as the baseline thermal solution. What they are proudest of is speed — from launch in February this year to a first release before ECOC in under 8 months; new members have been accepted since August. Connectors are deliberately multi-sourced (Samtec, TE and Molex all support type 1/2), and Samtec has brought socket insertion loss below 1 dB at 70 GHz and demonstrated 400G CPC over copper first, paving the way for the 400G/lane generation.
OIF (Session 2) — playing the long game and writing white papers. OIF's Jeff Hutchins (Ranovus) laid out the two paths for standards: MSAs are fast but less thoroughly validated, SDOs are thorough but slow, and the industry needs “standards on an AI timeline.” OIF's approach is to track hyperscaler needs closely and target the further-out 12.8T MPO (200G/lane), paving the way for the ecosystem with a stream of white papers (448G electrical framework, compute optics interface, energy efficient interfaces). Their quantitative targets are clear: below 4 pJ/bit and edge bandwidth density above 2 Tb/mm is CPO's sweet spot. Jeff also cited Meta's CPO switch data from DCOC 2025 — zero uncorrectable codewords and zero link collapses over an extremely high cumulative port-device-hour count — as a reliability endorsement. We covered this “official map” in full in OIF Draws an Official Map for AI Interconnect.
IPEC (Session 2) — small, nimble and racing for speed. A Huawei representative (speaking for IPEC) introduced this new SDO, founded in 2020, registered in Geneva and counting more than 41 members. They chose to stay pragmatically close to current demand with 6.4/7.2T NPO (rather than OIF's 12.8T), on a very aggressive schedule: kickoff in April, objectives set in June, first draft in December, standard released in June 2027 and a demo before ECOC in September — one year to a spec, which is fast by standards-body measures. The reasoning is blunt: IPEC is a small circle with few vendors, so consensus comes quickly; and 7.2T is exactly the density next-generation accelerators need now, while 12.8T is forward-looking.
OCP (Session 2) — the system-level conductor. Lightmatter's Steve Klinger brought the most distinctive angle: rather than writing component standards, OCP acts as the coordination layer that “ties all the MSAs/SDOs together.” They launched an open silicon photonics system-level initiative under OCP, led by former OCP CTO Bijan Nilroze, aiming to replicate the success of the OCP AI Server ecosystem (about 58 companies) in CPO/NPO optics. The first concrete output is a laser NIC form factor: it reuses the existing OCP NIC tray, integrates liquid cooling, is hot-pluggable, and moves a bank of ELSFPs from the front panel into the system, solving the problem of “fitting hundreds of ELSFPs into a 200T switch.” The goal is system-level HVM readiness by the end of next year.
Moderator Vlad's closing take was spot on: competition is a good thing. In the pluggable world, the QSFP-DD vs. OSFP battle ended with both finding their own use cases and each shipping tens of millions of units. This NPO form-factor fight most likely won't converge on a single option anytime soon either.
4. NPO vs CPO vs CPX: not picking sides, but coexistence
A recurring — and the most practical — conclusion of the conference: these three will coexist; none will replace the others.
The reasons NPO is the near-term pragmatic workhorse are concrete. The IPEC/Huawei representative said bluntly that CPO is “technically fascinating but operationally complex” — you get locked into a particular foundry's (e.g., TSMC's) packaging ecosystem, single-supplier capacity bottlenecks, and assorted packaging and supply-chain challenges; NPO, by contrast, can reuse the existing pluggable ecosystem, be serviced by dedicated repair depots, and offers high serviceability. ams OSRAM's Ashkan Seyedi added a key advantage: NPO keeps the optical engine outside the “fault domain” of the expensive accelerator package — if it fails, you pull the whole compute tray, send it back to the factory for rework, and reuse the accelerator and HBM instead of scrapping everything together. Add the fact that SerDes only needs to be over-provisioned once, and that moving to 800G doesn't require redesigning the connector as OSFP does, and NPO's flexibility is very appealing to system vendors.
As for whether optical connectors should be standardized, Session 1 gave an honest answer: not yet. The MSA standardizes only the shape (so modules are interchangeable) and leaves the optical coupling method to each vendor (pigtail or reflowable are both fine). The InnoLight representative named the practical consideration: pigtails will probably be the first choice, because pluggable optical connectors sound great, but a single speck of dust can ruin an entire optical path — when chasing high-volume deployment and reliability, pragmatism comes first. We have a dedicated piece on this battle: Can the Fiber Be Swapped? The Most Underestimated Hurdle in CPO Volume Production.
NVIDIA's Gilad delivered the most authoritative verdict on this: “NPO, CPX and CPO each have their own place, and they will coexist.” For ultimate performance and the lowest power, go CPO; for flexibility, mixed copper/optics, or swappable optical engines, NPO is a good choice. NVIDIA's CPO-to-NPO roadmap discussion also ripples through the entire laser supply chain; for more, see Is NVIDIA's Shift from CPO to NPO Bad News for the Laser Supply Chain?.
5. Enabling tech: “wide and slow” is coming for copper's scale-up turf
The biggest signal of Session 3 was a technology category taking shape: wide and slow NRZ optics, aimed squarely at short-reach scale-up (within about 100 meters), where copper is hitting its limits.
Why NRZ, and why slow? ams OSRAM's Ashkan gave the most systematic explanation. Highly synchronized networks like scale-up are extremely sensitive to jitter; PAM4 plus FEC introduces unacceptable latency and latency variation. Going NRZ instead and holding the physical-layer error rate at 10^-14 to 10^-15 makes it possible to be FEC-free with predictable latency. On power and cost, wide and slow can get below 2 pJ/bit (versus 3.5–4 pJ/bit for silicon photonics/TFLN approaches), and cost could approach $100 per Tb — compared with about $50 per Tb for copper today. The key is that it has “no laser and no PM fiber,” cutting engine-side cost in half; the remaining cost is dominated by the fiber connector, a mechanical problem.
The three companies in this session laid out different physical approaches:
Avicena (micro-LED). Nigel Alvarez's LightBundle uses micro-LEDs — no laser, slow-and-wide NRZ, high-temperature tolerant and easy to integrate with silicon — with TSMC as its photodetector partner. Its most powerful feature is pushing bandwidth density from “Tb/mm (shoreline)” to “Tb/mm² (areal, via 2D/3D stacking)”, effectively breaking the physical limit of shoreline. They claim to already be shipping a 1T/mm² ASIC solution (integrating 300+ drivers/TIAs), with a roadmap to 3.2T and 12.8T through faster speeds and tighter pitch.
Lumentum (VCSEL). Oleg presented a 1060 nm, flip-chip, back-emitting VCSEL in a hexagonal array that directly inherits the reliability dividend of consumer 3D sensing and automotive — showing accelerated testing at 8 mA and a 181°C junction temperature with zero failures over more than 5,000 hours. VCSEL's advantages are high data rates (up to 64 Gb/s), compact arrays, good pJ/bit efficiency, and the ability to build 6.4T-per-direction links with off-the-shelf MPO and standard fiber.
Tower Semiconductor (the foundry view). Amal Kalberge reminded everyone of one thing: silicon photonics has “graduated” and no longer counts as an enabling technology — 1.6T is reportedly the fastest optical technology ever to reach 10 million units. He used scale up / out / across to describe the three stages any enabling technology goes through from lab to market dominance, stressing the importance of “prototyping on production tools” so that, once validated, volume can ramp quickly. He also called out an easily overlooked path — linear SiGe EICs, critical for both NPO and LPO. (Incidentally, his talk was cut off midway by a lightning strike in San Antonio before he reconnected — arguably the most vivid moment of the event.)
A consensus point worth underlining: ams OSRAM warned that interposers are getting unreasonably large. As more accelerators and HBM cubes are added, optics are being squeezed out of the tray; combined with tight substrate supply, and TSMC's CoWoS itself posing a threat to substrates, this means die-to-die may eventually have to sit directly on the interposer — an entirely different set of problems to solve. That's why the “put it anywhere” flexibility of wide and slow is valued. For a fuller look at the packaging contest, see CPO Is Won in Packaging, Not Optics — John Lau on PIC/EIC Heterogeneous Integration.
6. NVIDIA settles it: CPO is in volume production now, not two years from now
In the closing fireside chat, Gilad Shainer ended the “CPO is always two years away” cliché in the bluntest way possible: “Those who say CPO is still two years from adoption should have said that two years ago.” Because it is now in full volume production.
His concrete evidence: NVIDIA has already shipped CPO switches to some close partners and deployed CPO switches inside its own AI factories, with excellent performance — not only lower power in the CPU infrastructure, but more importantly, a major jump in resilience, with MTBI improving by an order of magnitude. This year, large volumes of CPO will be installed in AI factories around the world.
He also laid out NVIDIA's pacing philosophy: before any technology goes into volume production, NVIDIA must first confirm that massive capacity is in place behind it — which is why it has invested in ecosystem partners all along the chain, from optical engines and packaging to fiber arrays and custom laser sources. On standards, NVIDIA welcomes and participates in them, but sometimes has to move faster than the standards — releasing technology, gaining experience, then feeding more elements back into standardization. This “run first, standardize later” attitude actually runs on the same industry clock as the “ship a spec first, then iterate” thinking of IPEC and OpenCPX. We also wrote a dedicated piece on IPEC's path from CPO vision to NPO reality: IPEC Webinar: From CPO Vision to NPO Reality.
Incidentally, Gilad also mentioned that NVIDIA is moving to 100% liquid cooling — with 45°C warm-water cooling — eliminating chiller power. In a framework where power equals tokens equals revenue, this and power-efficient optical networking are two sides of the same coin.
Conclusion
The biggest signal from this conference isn't how fast any technology runs, but that the industry's center of gravity has shifted from “does the technology work” to “who can reliably ramp to millions of units”. Three things worth pinning to the wall:
First, 2026 is CPO's first year of commercial deployment — NVIDIA is already in volume production; this is no longer a line on a roadmap but a line on a shipping order. Second, NPO is the pragmatic workhorse for the next year or two: serviceable, outside the fault domain and built on the existing ecosystem, it's a solution system vendors can adopt today, while CPO is the lowest-power endgame — and the two will coexist long term. Third, “wide and slow” is the new variable in scale-up: micro-LED and VCSEL are pursuing an NRZ, FEC-free, laser-free path aimed at the sub-100-meter short reach where copper can't keep up, pushing cost and power down toward copper's tier.
On standards, OpenCPX, OIF, IPEC and OCP are advancing in parallel and won't converge in the near term — but as Vlad said, the QSFP-DD vs. OSFP competition of the pluggable era ultimately benefited the whole industry, and this time will likely be the same. For anyone positioning in the optical communications supply chain, the watch points for the next three months are clear: the first OpenCPX spec release (before ECOC), the optics agendas at OCP APEX Taipei (August) and the Global Summit (October), and which wide-and-slow solution lands a hyperscaler production deployment first. The wolf really has come this time — the only question is which door it walks through.
Related Reading
The Great Optical Packaging Transition (Part 2): CPO's Three-Stage Evolution — Scale-Out Moves First, Scale-Up Is the Endgame: the most thorough breakdown of the pluggable→NPO→CPO migration path discussed throughout this conference.
OIF Draws an Official Map for AI Interconnect: Three Networks, One pJ/bit Battlefield: the full version of the pJ/bit and bandwidth-density targets OIF presented in Session 2.
IPEC Webinar: From CPO Vision to NPO Reality — The Technology Path and Industry Game of Near-Packaged Optics: essential reading for a deeper look at IPEC's NPO approach.
Is NVIDIA's Shift from CPO to NPO Bad News for the Laser Supply Chain?: read alongside Gilad's NPO/CPO coexistence argument.
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