With 512K-GPU clusters becoming the norm for AI factories, copper is hitting its limits. An OFC 2026 panel showed how CPO delivers a 3.5X efficiency gain, and how the 12.8T XPO rewrites the switch-density game.

When does copper run out? At OFC 2026, Meta answered with 90 million device-hours of field data: CPO cuts link power by 65% and, excluding one fixable component issue, is more than 10x more reliable than pluggable modules.

Copper's physical limits have become the bottleneck to scaling AI. At OFC 2026, Broadcom showed its latest CPO and OCI progress - ultra-low 6 pJ/bit power and exceptional reliability - signaling that optics will dominate both scale-out and scale-up networks.

GF posted a strong Q1 with gross margin hitting a record 29%. Smartphones remain soft, but silicon photonics and automotive demand are surging, and management expects SiGe capacity to stay sold out through 2027. Here's how the foundry is transforming through its SCALE platform and IP acquisitions.

Token demand wants 10x a year while supply delivers only 2x, and the compounding 5x gap can only be closed by architecture. Ayar Labs CEO Mark Wade's key line at OCP APAC wasn't about CPO but this: the unit of adoption shrinks from a whole rack to a single chassis.

The light-source race has switched tracks: it's no longer about whose laser is brighter, but who can make billions of them by 2030 without spending 5 minutes of active alignment on each. At ECOC 2026, two sessions and 11 speakers delivered eight technology paths and an 18 dB bill.

At ECOC 2026, 12 speakers weren't really arguing CPO vs pluggables — they were arguing about the SerDes at the XPU edge. Arista's XPO and Broadcom/NVIDIA CPO bet on 200G→400G PAM4; OCI and DWDM bet on slow-and-wide NRZ. 2027–2028 belongs to fast-and-narrow; slow-and-wide must wait for the gearbox tax to hit zero.

As AI models head toward Yottascale, optical interconnect architecture faces an unprecedented shift. From soldered to socketed, from external lasers to optical backplanes, how are Meta, AMD, Microsoft and other giants defining the next AI interconnect standard?