2026 OCP APAC Summit | Astera Labs | Jeffrey Kung | Optical Scale-Up Fabrics for Next-Generation AI Infrastructure

2 days ago

9 min read

On the surface, Astera Labs’ keynote was about “copper hits the bottleneck, optics takes over,” but the real point was another line: the value of optical interconnect isn’t saving power; it’s unlocking the physical boundary of the pod. When channel reach goes from centimeters to meters, switch radix is no longer bound by copper length, heat and power can be spread out, and topology is freed from leaf-spine to full mesh and dragonfly. That’s an architectural unlock, not a component upgrade. And Astera Labs never presented itself as an optical component maker; what it stressed again and again was “integration + validation + management software.” That positioning determines which segment Taiwan’s supply chain can capture.

1. The talk in one line: the bottleneck has moved from compute to the fabric

Speaker Jeffrey Kung didn’t open with technical definitions. He started by stretching out the timeline: from generative AI and LLMs to agentic workflows, token usage will grow exponentially over the next few years, pushing data centers toward “sustained, low-latency, all-to-all” communication patterns.

He then delivered the heaviest judgment of the talk:

The assumptions we made about infrastructure five years ago are not just no longer applicable; they’re already obsolete.

In the past, the answer to improving AI system performance was intuitive: add more accelerators, chain them longer, swap in faster ones. But modern AI fabrics have grown far beyond previous generations, and the bottleneck has moved with them: without enough fabric bandwidth, you simply can’t put all the accelerators you have to effective use.

The quality of the scale-up fabric directly determines the performance of the whole system.

People in Taiwan’s supply chain should write that down. It means: interconnect is no longer peripheral; it is first priority on the spec sheet. At the same OCP, SemiAnalysis took the opposite side, arguing that “copper vs. optics” is a false dichotomy. You need both views together for the full picture; we broke it down in 2026 OCP APAC Summit | SemiAnalysis | Scale Up Sophistry: Copper vs. Optics Is a False Dichotomy.

2. The copper bottleneck isn’t “can’t run”; it’s the DSP tax shrinking the pod

The speaker was actually fair to copper: copper is a good technology that has taken us a long way. The problem is the physics at high data rates.

At 200 Gbps per lane, every copper channel problem has already arrived: skin effect, dielectric loss, crosstalk, plus loss in the package itself, all compressing channel reach. At 400 Gbps per lane, all of these get worse at once.

Technically there’s a fix: throw a more aggressive DSP at it. But the speaker spelled out the cost: higher power, higher cost, lower efficiency. And that bill gets multiplied by the port count:

Looked at one port at a time, the DSP tax isn’t that bad. But multiply it across all ports and the bill gets big.

The more critical cost is the second-order one: short channels mean small pods. Everything is forced into the same rack or adjacent racks, so dense heat and power all concentrate at one point, creating zones that are “extremely hard to power and extremely hard to cool.” Reaching farther means inserting retimers, and retimers add latency, cost, and power.

That is the true shape of the “copper bottleneck”: it’s not that the signal can’t get there; it forces you to build the system small, then smothers that small space in heat. That’s also why thermal design for 51.2T-class switches has become a topic of its own; we broke down the thermal budget in 51.2T NPO switch cooling: an 835W ASIC plus 16 optical engines, air or liquid?.

3. The real value of optics: channels go from centimeters to meters, and only then does radix open up

The speaker’s definition of optics was crisp: optical attenuation is independent of signaling rate. No skin effect, no dielectric loss, so none of that complex DSP is needed.

Then came the most vivid quantification of the talk:

Channels we used to measure in centimeters, we now measure in meters.

That line is the core of the talk, because it connects to radix. The speaker defined radix in plain terms: how many links a single switch can fan out. High radix matters not because the spec looks good, but because of hop count:

Traditional leaf-spine: compute → top-of-rack → spine; any two compute boards are at least two hops apart
Same compute, with a high-radix switch: one hop

One fewer hop means less latency, one less layer of complexity, and a lot less for network management software to handle. And once channel reach is freed, the pod’s physical boundary opens up: heat no longer concentrates, retimers aren’t needed for life support, a single fabric can connect accelerators on the order of “tens of thousands,” and topology is freed from leaf-spine to options like full mesh and dragonfly.

So the first value of optics is an architectural unlock; power savings are a side benefit. This judgment points in the same direction as the scale-up optical interconnect routes we compiled earlier; the details of where each of the seven paths hits a bottleneck are in After copper can’t carry AI: seven routes for scale-up optical interconnect

4. A three-stage roadmap: pluggable → near-package → co-packaged

The speaker used a handy yardstick to line up all optical solutions: how close the optical engine sits to the switch chip.

Pluggable optics: the optical engine sits in the cable plug, and the path from module to switch is still electrical. The ecosystem is the most mature and existing systems can be retrofitted directly. The downside is just as plain: the farther away it sits, the less of the benefit you capture.

Near-Package Optics (NPO): the optical engine moves next to the package; an electrical channel remains, but its length drops from centimeters to millimeters, with no extra power needed to bridge the distance. The speaker said it’s “already in limited deployment and available today,” MSA standardization is moving fast, and what you get is lower power, higher port density, and longer optical reach.

Co-Packaged Optics (CPO): pulled right onto the chip, connector and signal density rise sharply and energy per bit drops sharply. For the cost, the speaker used a very honest word: thermal design and manufacturability get “interesting,” and the technology is still early and not yet standardized.

His final positioning was clear: NPO is today’s pragmatic answer; CPO is the long-term optimum. That matches the signal we got tracking the LightCounting CPO/NPO conference: the market has moved from “will CPO come?” to “how long will NPO carry the load?” Details in CPO is finally no longer “crying wolf”.

5. The Q&A was the real highlight: three questions covered all the risks

The keynote itself leaned toward architectural argument; it was three questions from the audience that dug out the hardest parts.

Q1: How does in-network computing pair with workloads? The speaker said outright, “That’s a good question, but I’m not in the right position to answer it.” That answer is itself a signal: in-network compute and collective acceleration are exactly what Astera Labs’ Scorpio line markets externally, so there is clearly still a gap between what can be said and what can be committed.

Q2: CPO serviceability. The speaker’s answer was honest: in theory you could pull the whole unit back to a depot and replace a single connector, which is “possibly doable”; but whether that’s practical in real operations, he wouldn’t commit based on current information. This is CPO’s most expensive bill: not yield, but field repair.

Q3: Where does the power gap between NPO and CPO come from? The answer was the most valuable line of the session:

You get better power efficiency not because any single component is designed to be more efficient, but because your density goes up.

In plain terms: CPO doesn’t save “watts per component”; it means the same fabric needs fewer components and less peripheral circuitry. So CPO’s benefit has to be counted at the system level; component-level pJ/bit comparisons will badly under- or overestimate it. That’s also why, when OIF made pJ/bit the official battleground metric, you have to be clear about “which layer it’s measured at.” We unpacked this measurement trap in OIF draws an official map for AI interconnect.

6. Astera Labs’ positioning: it doesn’t sell optics, it sells “the integrated package”

The part of the talk that read most like a business manifesto was this: building the switches, optical modules, driver ICs, and retimers is not enough.

The winner of this race will be the one that can deliver end to end something “fully integrated, fully validated, and paired with good management software.”

That sentence defines Astera Labs’ self-positioning: it isn’t trying to beat optical module makers on component price; it wants to be the player that validates the whole chain and manages it with software. Set against the company’s recent public moves, this positioning is consistent:

In May 2026, Astera Labs launched the 320-lane Scorpio X-Series smart fabric switch, featuring single-hop topology, Hypercast, and an in-network compute engine (claiming up to 2x acceleration for collective operations). It shipped at launch, with volume ramp in the second half of 2026 (source: Astera Labs press release)
At Computex 2026, its demo connected OSFP-XD LPO (linear pluggable optics) modules directly to Scorpio, running PCIe Gen 6 over 50 meters of fiber at BER of 1e-8 or better. By removing the retimer/DSP, it pushed power “well below traditional retimed architectures,” and used COSMOS software for SerDes tuning and optical module calibration (source: Astera Labs official demo description)
On the financial side, Scorpio’s ramp arrived a quarter earlier than originally expected (see our Earnings call highlights: Astera Labs (ALAB) | FY2026 Q2)

Stack the keynote on top of these three moves and Astera Labs’ strategy is unambiguous: first capture optics’ reach advantage with a “no-DSP” bridge solution like LPO, then move to NPO, with CPO as the endgame; the money it really wants to collect is in switch silicon and management software, not in the optical engine itself.

7. What it means for Taiwan’s supply chain: the opportunity is in “that millimeter segment” and validation

If NPO is the real battleground for the next two to three years, these are the three specific areas Taiwan’s supply chain should watch:

First, packaging and substrates. NPO by definition moves the optical engine next to the package and compresses the electrical channel to millimeters. That segment relies on advanced packaging, substrate routing, and signal integrity design. This is where Taiwan currently has the most say, and it’s why the TSMC and ASE keynotes at the same event repeatedly stressed that packaging is the gatekeeper.

Second, the redistribution of heat and power. The speaker said optics “spreads out” the heat, but that’s a system-level statement; in practice heat just moves from the center of the rack to around the optical engines, so cooling design, connector heat tolerance, and the temperature gradient near optical engines all need to be redone. For thermal module, connector, and power module makers, this is a new spec question, not an extension of existing specs.

Third, validation and serviceability. The speaker’s cautious answer on CPO serviceability in the Q&A effectively marks out a TAM: mechanical and test solutions that are field-replaceable, testable, and diagnosable. Whoever turns “one fails, swap one” into a standard process gains pricing power in the next round.

As for signals to track, three things over the next six to twelve months are enough: (1) the timeline for finalizing the NPO MSA; (2) whether 400G-per-lane specs get written into actual RFQs; (3) whether real switches using LPO/NPO show up in cloud operators’ public rack specs. Once these three move, NPO goes from “limited deployment” to “mainstream option.”

Conclusion

The best thing about this talk is that it didn’t cast optics as a savior. The speaker was fair to copper, honest about CPO’s difficulties, and said “not sure” when asked about things he wasn’t sure of. The one judgment it really leaves is this: the value of optical interconnect is unlocking the pod’s physical boundary so radix and topology become designable again; power savings are a dividend that comes along with it.

For Taiwan’s supply chain, this means the keywords should shift from “speed” to “distance” and “density.” Whoever brings mature solutions for millimeter-scale electrical channels, package-level cooling, and field serviceability will be a must-have supplier for the next round of scale-up fabrics. This transition is already underway, and it needs electrical, mechanical, signal-integrity, and thermal engineers all on the field together, not a breakthrough in any single component.

This article is based on the live transcript from the 2026 OCP APAC Summit; some technical terms are reasonable reconstructions from speech-to-text (e.g., NPO near-package optics, Scorpio X-Series). Company product data cited comes from Astera Labs’ public press releases and official demo descriptions.

This article is for technology and industry trend analysis only and does not constitute investment advice.