ECTC 2026 | AIST | Proposal of a Novel Opto-Electronic Fan-Out Wafer-Level Packaging Based on Optical RDL and Opto-Chiplets

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For CPO to reach volume production, one step is holding it back: the micro-lens. Today micro-lenses are attached as discrete parts by pick-and-place and then actively aligned, which is slow, expensive and yield-limited, a bottleneck to scaling. At ECTC 2026, Japan's AIST proposed a new packaging approach: build the "lens + mirror" into an opto-chiplet, embed it during the molding step, and then fabricate an optical redistribution layer (Optical RDL: polymer waveguides plus imprinted micro-mirrors) to route light to the PIC. The benefits: no post-assembly lens attach, no active alignment, and full compatibility with existing high-throughput fan-out wafer-level packaging (FOWLP) flows. Results: the lens-mirror opto-chiplet shows a simulated transmission loss of -0.22 dB and a measured device loss of -1.75 dB; most importantly, alignment tolerance widens from ±1 µm for edge coupling to ±12 µm (at -1 dB), because the mode field is 12.5× larger. In one sentence: alignment moves from "forced into place at assembly" to "built in at packaging," giving CPO a manufacturable optical-coupling path.

1. Background: micro-lens pick-and-place is a CPO volume-production bottleneck

This paper comes from Japan's National Institute of Advanced Industrial Science and Technology (AIST, Tsukuba) and was presented at the 2026 IEEE 76th ECTC. To couple light into a PIC, CPO commonly uses micro-lenses to widen alignment tolerance, but the micro-lenses are attached as discrete components, requiring pick-and-place plus active or semi-passive alignment, steps that are inherently slow, labor-intensive and costly. Back-end lens attach can achieve decent yield, but it turns "precision alignment" into a scaling bottleneck; large-scale CPO commercialization needs a different strategy.

AIST's proposal: build the lens-mirror into an opto-chiplet and embed it during the molding step, together with an Optical RDL (ORDL) that routes light laterally to the PIC. For the idea of integrating optical redistribution into the package, see Using fan-out packaging for a 1.6T optical engine: A*STAR's low-cost CPO approach; for background on polymer waveguides as the ORDL, see Technical article analysis | Polymer waveguides withstand +20 dBm for six hours. What sets the AIST paper apart is building alignment into the molding step.

Fig. 1: OE-FOWLP architecture — the lens-mirror opto-chiplet is molded into the FOWLP together with the EIC/PIC, and the ORDL routes light to the PIC. Source: AIST, ECTC 2026 - Fig. 1

2. The core question: the whole paper in one sentence

What this paper sets out to prove: whether a lens-mirror can be made into an opto-chiplet embedded during molding, with an Optical RDL routing light to the PIC, thereby eliminating post-assembly lens attach and active alignment while remaining compatible with FOWLP volume-production flows.

The answer is a proposal plus preliminary validation, and the key is the manufacturable figure of "alignment tolerance widened to ±12 µm."

3. Key figures, one by one

3.1 This figure shows how the opto-chiplet is made and embedded

These figures (Fig. 1, Fig. 2) cover the architecture and process. The opto-chiplet is fabricated before wafer-level integration: a lens-mirror freeform surface is made on fused silica glass by two-photon lithography (3D printing, IP-Dip2 resin, 0.2 µm resolution, print height up to 360 µm), gold is sputtered at an angle to form the reflective surface, and the part is then encapsulated. During molding, the opto-chiplet is embedded into the FOWLP together with the EIC/PIC; then the electrical RDL and the Optical RDL (polymer waveguides + imprinted micro-mirrors) are built to route light laterally to the PIC, followed by carrier debonding, dicing and flip-chip attach to the package substrate. The lens widens vertical/lateral tolerance, collimation relaxes in-plane fiber tolerance, and the mirror turns the light into the underlying polymer waveguide, which leads it into the PIC.

Key point: alignment is designed into the process, not adjusted at assembly.

3.2 This figure shows transmission loss: -0.22 dB simulated, -1.75 dB measured

These figures (Fig. 5, Fig. 6) cover optical performance. Simulated at 1.31 µm with physical optics propagation (ANSYS Zemax), with collimated fiber input (25 µm radius) and SMF output, the opto-chiplet's simulated transmission is -0.22 dB. The measured device transmission is -1.75 dB; after the paper breaks down the difference (beam quality, uncoated backside metal, etc.), the residual shrinks to -0.36 dB. In other words, most of the gap comes from process details rather than fundamental limits.

3.3 This figure shows a 12× wider alignment tolerance — and this is the point

This figure (Fig. 6) covers alignment tolerance. Measuring normalized efficiency versus lateral decenter, the alignment tolerance at -1 dB loss is about ±12 µm; by comparison, fiber-to-SiN edge-taper coupling in the literature is only about ±1 µm at the same loss. The difference comes from a mode-field diameter in the coupling region that is 12.5× larger. This is the core value of the opto-chiplet: relaxing "micron-level active alignment" into "passive tolerance of a dozen-plus microns," which is what makes volume production workable.

4. Technical highlights

The first highlight is building alignment into molding: the lens-mirror is made into an opto-chiplet embedded during molding, eliminating post-assembly pick-and-place lens attach and active alignment while remaining compatible with existing high-throughput FOWLP flows. It is an architectural innovation aimed squarely at the volume-production bottleneck.

The second highlight is ±12 µm alignment tolerance: a 12.5× larger mode field relaxes tolerance from ±1 µm to ±12 µm, effectively downgrading "micron-level alignment that requires active light searching" to "dozen-micron alignment that passes passively." Combined with a polymer ORDL and imprinted micro-mirrors for lateral light routing, it forms a complete, manufacturable optical path.

5. Industry links: how far from production, and who benefits?

Distance: maturity sits at "proposal plus preliminary device validation." Transmission and alignment tolerance have been measured on the lens-mirror opto-chiplet unit, but the lens is currently 3D-printed (for early evaluation; volume production would need a manufacturable process), and the full OE-FOWLP is still a process proposal with no complete system built. Production is still some way off, but the direction is clear.

Beneficiaries: most directly, OSATs pursuing FOWLP and CPO optical-coupling solutions. Building in the gating alignment step addresses both volume-production yield and cost. Next come the polymer ORDL and micro-optics (lens/micro-mirror) ecosystems. A note of caution: volume production of 3D-printed lenses, opto-chiplet placement accuracy during molding, and ORDL-to-PIC integration yield all still need validation. It wins on the architectural idea of moving alignment from assembly into packaging; engineering execution comes later.

6. Conclusion

The one sentence to remember from this paper: by turning the micro-lens alignment that most holds back CPO production from "active forcing at assembly" into "an opto-chiplet built in at molding," AIST uses a ±12 µm alignment tolerance (12.5× larger mode field) to show this path is manufacturable and FOWLP-compatible. For anyone tracking CPO packaging, the thing to watch is that the contest in optical coupling is shifting from "how precisely can you align" to "how large is the tolerance, and can it be built into the volume-production flow" — and AIST has laid out that idea clearly.

References

Siim Heinsalu, Fumi Nakamura, Satoshi Suda, Akihiro Noriki, "Proposal of a Novel Opto-Electronic Fan-Out Wafer-Level Packaging Based on Optical RDL and Opto-Chiplets," 2026 IEEE 76th ECTC. AIST, Tsukuba, Japan.