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The Great Shift in Photonics Packaging (Part 1): From Back-End Assembly to Value Core — Why This $14B Market Suddenly Got Hot
For a decade, photonics packaging was the last mile of assembly that nobody talked about. AI has pushed it center stage, with the market set to grow from $4.5B to $14.4B in six years — driven not by transceivers but by three new tracks opening at once: CPO, AR microLED and FMCW LiDAR. Part 1 of the series lays out the big picture.
2 days ago


OFC 2026 - Intel's Silicon Photonics OCI Chiplet and Bandwidth Scaling for AI Infrastructure
The AI compute race has entered its second half, and bandwidth and power are now make-or-break. Intel's OCI chiplet at OFC 2026 signals that the convergence of photonics and electronics at the chip level has arrived, rebuilding data center architecture rather than merely improving specs.
2 days ago
![[CPO Deep Dive 2/6] The Paradigm Shift in Photonic Packaging: Why CPO Is an Advanced Packaging War](https://static.wixstatic.com/media/82206f_a30d6fbdd21248bd828a252a97c481d3~mv2.png/v1/fill/w_443,h_250,fp_0.50_0.50,q_35,blur_30,enc_avif,quality_auto/82206f_a30d6fbdd21248bd828a252a97c481d3~mv2.webp)
![[CPO Deep Dive 2/6] The Paradigm Shift in Photonic Packaging: Why CPO Is an Advanced Packaging War](https://static.wixstatic.com/media/82206f_a30d6fbdd21248bd828a252a97c481d3~mv2.png/v1/fill/w_305,h_172,fp_0.50_0.50,q_95,enc_avif,quality_auto/82206f_a30d6fbdd21248bd828a252a97c481d3~mv2.webp)
[CPO Deep Dive 2/6] The Paradigm Shift in Photonic Packaging: Why CPO Is an Advanced Packaging War
CPO isn't stalled because the components can't be built, but because packaging has switched to an entirely new method. Once the optical engine moves onto the ASIC substrate, photonic packaging must become semiconductor-grade. Whoever standardizes it for foundries and OSATs controls the CPO timeline.
2 days ago
![[CPO Deep Dive 5/6] The CPO Ecosystem Is Being Reshuffled: Foundries and OSATs Move From Supporting Cast to Lead](https://static.wixstatic.com/media/82206f_d3424cbd53e64b02aa58fc687b26206b~mv2.png/v1/fill/w_443,h_250,fp_0.50_0.50,q_35,blur_30,enc_avif,quality_auto/82206f_d3424cbd53e64b02aa58fc687b26206b~mv2.webp)
![[CPO Deep Dive 5/6] The CPO Ecosystem Is Being Reshuffled: Foundries and OSATs Move From Supporting Cast to Lead](https://static.wixstatic.com/media/82206f_d3424cbd53e64b02aa58fc687b26206b~mv2.png/v1/fill/w_305,h_172,fp_0.50_0.50,q_95,enc_avif,quality_auto/82206f_d3424cbd53e64b02aa58fc687b26206b~mv2.webp)
[CPO Deep Dive 5/6] The CPO Ecosystem Is Being Reshuffled: Foundries and OSATs Move From Supporting Cast to Lead
CPO shifts value from module assembly to advanced packaging, and the biggest winners are not legacy module makers but foundries and OSATs with silicon photonics and advanced packaging capabilities. Taiwan's ecosystem is regrouping around them, and standardization will decide the outcome. But pluggables are still growing, and the steering wheel remains in the hands of the platform giants.
2 days ago


It's Not the Chip That Gets You Designed In: Fiber Attach and a Speck of Dust
What gets a supplier into the BOM isn't pJ/bit. It's fiber-attach takt time and a single speck of dust on an end face. This is a manufacturing race, not a photonics race.
2 days ago


ECTC 2026 | AIST | Proposal of a Novel Opto-Electronic Fan-Out Wafer-Level Packaging Based on Optical RDL and Opto-Chiplets
CPO volume production is held back by micro-lens pick-and-place and active alignment. AIST turns the lens-mirror into an opto-chiplet embedded during molding, routes light with an Optical RDL, and widens alignment tolerance to ±12 µm.
2 days ago


ECTC 2026 | imec | Wafer-to-Wafer Hybrid Bonding Technology with 200nm Interconnect Pitch
imec pushed 3D-stacking hybrid bonding to a 200 nm pitch, but the real message is that the deciding factor has moved from bonding to overlay, CMP and pad design. Why is 200 nm a yield cliff, why are overlay accuracy and electrical yield locked in a linear relationship, and where is the next bottleneck for AI 3D integration?
2 days ago


ECTC 2026 | ASE | Characterization of Bonding Behavior and Void Formation in Chip-on-Wafer Hybrid Bonding
CoW hybrid bonding yield is first gated by the initial bonding-front angle. By tuning the angle to D so the bonding wave advances in order from center to edge, ASE lifted yield on 8×12×0.05mm dies from 2.8% to 99%, and held 95–99% on ultra-thin dies with 102.4µm warpage, 6µm pitch and organic interfaces, greatly widening the process window.
2 days ago


ECTC 2026 | ASE | A Novel 600mm Panel Interposer with 300mm Panel Assembly Approach for Advanced Packaging Solution in HPC and AI Applications
600mm panels give FOPLP high utilization but warp easily during assembly. ASE's hybrid flow — RDL on 600mm panels, assembly on 300mm panels — delivers 7.1x productivity at low risk, with 3-layer 5/8µm RDL, ±5µm placement accuracy and passing 3x/6x reflow. A pragmatic panel route for AI packaging.
2 days ago


Earnings Call Highlights: FormFactor (FORM) | FY2026 Q2 — The Toll Gate for HBM4 and CPO Testing: $1B+ Annualized Revenue, Gross Margin Above 50% for the First Time
FormFactor's quarterly revenue crossed a $1B annualized run rate and non-GAAP gross margin topped 50% for the first time, with HBM4, CPO and GPU all firing at once. But the real leverage — the Rubin ramp, the MEMS transition for ASICs and Farmers Branch margin gains — lands in 2027–2028. This quarter buys credibility for the slope, not just pretty numbers today.
2 days ago


ECTC 2026 | Tohoku University | Chemically Tailored Cu-Electroplating and Contactless Isostatic Annealing of 1-mm-Thick Full Glass Wafer Cu Through-Glass-Vias
For glass to work as an advanced packaging interposer, the first hurdle is filling deep, straight TGVs with good copper. Tohoku University combines an electroless nickel seed, chemically tailored electroplating and HIP annealing to fill straight vias in 1 mm-thick glass void-free and grow >45 µm grains — a foundational breakthrough for glass TGVs.
2 days ago


ECTC 2026 | Applied Materials | First Demonstration of 450nm Pitch Cu-Cu Hybrid Bonding with 98% Yield Across 20M Interconnects for Ultra-Dense 3D Integration
W2W Cu-Cu hybrid bonding pushed to 450 nm pitch for the first time while holding high yield (98%/100% across 20 million interconnects). Applied Materials traced the yield killer to residual BTA carbon at the bond interface and engineered the interface chemistry, barrier and anneal — groundwork for 3D DRAM and HBM.
2 days ago


Earnings Call Highlights: Amkor Technology (AMKR) | 2026 Q2
Amkor posted record revenue, driven by AI computing and advanced packaging rather than traditional smartphones. CPO joined its technology platform for the first time, and long-term deals with TSMC and NVIDIA tie it to the core of the AI supply chain.
2 days ago


2026 OCP APAC Summit | AI Hardware's Next Battlefield Isn't Process Nodes, It's Packaging: Breaking Down ASE CP Hung's “Integration Trilogy”
Whether AI systems can ship no longer depends on process technology alone, but on integrating compute, optics and power at volume. ASE's CP Hung spelled out this shift with his “advanced packaging trilogy” — and as the battlefield moves from scaling to integration, Taiwan's supply chain holds a stronger hand.
2 days ago


2026 OCP APAC Summit | GlobalFoundries | Thomas Barber | Turning the Optical Engine into a Chip: CPO Is No Longer Won on Optics
The CPO technology debate is over; the race is now about yield, test and delivery. With SCALE, GlobalFoundries turns the optical engine into a fully tested semiconductor part built to last a decade, targeting 20–30% of pluggable cost. The real variable isn't optics — it's interoperability standards that have yet to converge.
2 days ago


Earnings Highlights: UMC | 2026 Q2 — Mature Nodes Recover, First Silicon Photonics Volume Shipments, and UMC's Second Growth Curve Emerges
UMC's Q2 EPS hit a record NT$3.39, but the tripling of net income came largely from non-operating gains; the core business recovered on higher utilization. The real story is three new curves ramping in 2028: silicon photonics volume shipments, Intel 12nm, and advanced packaging.
2 days ago


2026 OCP APAC Summit | Coherent | Anna Tatarczak | 400G/lane Is Bottlenecked by Electronics, Not Optics: IM/DD Isn't Done Yet, but Packaging Has to Save It
The optics problem at 400G/lane is essentially solved; what remains is electrical, packaging and connectors. Coherent pinpointed the bottlenecks: wire bonds collapse above 110 GHz, OSFP connectors dip at 90 GHz, and PAM6 in optics hits an SNR wall. IM/DD can stretch to 800G, but it needs electronics, not photonics.
2 days ago


2026 OCP APAC Summit | ASE | Nicole Tien | Inside the Package: What Holds CPO Back Isn't the Optics, It's the Testing Nobody Wants to Talk About
At OCP, ASE laid out CPO's three-step energy-efficiency math and delivered the most honest line of the event: almost nobody is talking about optical engine yield testing. CPO's technology debate is over; the yield debate has begun. The next signal to watch is not who announces more Tbps, but who first publishes KGOE test yield.
2 days ago


2026 OCP APAC Summit | TSMC Says It Plainly: Advanced Packaging Is the Gatekeeper of AI Compute, and the Era of Component-Level Qualification Is Over
TSMC's 3DIC talk at OCP carried one real message: component-level qualification is dead. With customer chips entering the fab before TSMC's own test vehicles, packaging has become the gatekeeper of AI compute, and TSMC wants the whole supply chain inside STCO. Its line that 'signaling belongs to photons' is a direct endorsement of CPO and silicon photonics.
2 days ago


2026 OCP APAC Summit Full Readout: 24 Sessions, One Story
Twenty-four sessions at OCP APAC 2026 told the same story: the AI infrastructure bottleneck is shifting from how fast you compute to whether you can connect it and keep it running. Here is the full map, with an index of all 24 session notes.
2 days ago
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