2026 OCP APAC Summit | GlobalFoundries | Thomas Barber | Turning the Optical Engine into a Chip: CPO Is No Longer Won on Optics
GlobalFoundries' talk at OCP 2026 APAC spent no time proving that "optics beat copper" — that debate is over. It spent 20 minutes on one thing: how to turn the optical engine into a semiconductor part that can be mass-produced, fully tested and warranted for ten years.
Three numbers define the bar: pluggable optical modules today run at about 25 pJ/bit versus 4–5 pJ/bit for copper; a 1.6T pluggable costs hundreds to over a thousand US dollars; and restarting a single training job costs hundreds of thousands to millions of US dollars.
GF's answer is called SCALE (Silicon Photonics Co-packaged Advanced Light Engine): three parts — PIC + EIC + fiber connector — assembled, tested and shipped as a known good optical engine. The effective cost target is 20–30% of a pluggable.
The most candid part of the talk is its call to action: CPO has its optical specs, but not yet interoperability testing or a mechanical MSA. This is the biggest uncertainty today, and GF admits it.
What it means for Taiwan's supply chain: the gains concentrate in advanced packaging, double-sided electro-optical test, and detachable fiber connectors (FAU), while half the BOM of assembly-only optical module makers is structurally eliminated.
1. Why Now: Scale-Up Must Grow from One Rack to Twelve
Thomas Barber opened by splitting the AI data center network into three tiers: scale-up (tens to hundreds of tightly coupled GPUs that behave like one GPU), scale-out (stacking these clusters into supercomputers of 10,000, 100,000 or even a million GPUs), and scale-across (long-reach links across data halls and campuses).
The latter two tiers have long been optical territory because of distance. The only tier optics has not yet taken is the bottom one: scale-up.
And scale-up specs are being stretched in two directions at once: per-lane rates are moving from today's 200 Gbps to 400 Gbps; reach is expanding from "one rack" to "six racks and 500 GPUs", or even "twelve racks and 1,000 GPUs".
Copper simply gives up here. 200 Gbps direct-attach copper (DAC) only reaches about 2 meters — which is why every scale-up switch today sits in the middle of the rack, so cables only need to span half a rack. Active electrical cables (AEC) stretch to 7–10 meters, which is still only two or three racks. For a 1,000-GPU scale-up domain, copper has no cards left to play.
Optics has three structural advantages: 400 Gbps per fiber to start, stackable toward Tbps; virtually unlimited bandwidth; and distance doesn't cost power — copper needs more power for every extra meter, while optics costs the same however far it goes.
AI networks are fundamentally thermally limited. Every picojoule spent on communication is a picojoule that can't be spent on compute.
This line is the foundation of the whole talk. It also explains why CPO competition centers on pJ/bit rather than bandwidth — optics won on bandwidth long ago. We broke down the copper-vs-optics debate in full in Scale Up Sophistry: Copper vs. Optics Is a False Choice.

2. Why Optics Hasn't Entered Scale-Up: Three Hurdles
Barber boiled down the reasons optics has yet to enter scale-up to three issues, each with numbers attached:
Power. Pluggable optical modules today run at about 25 pJ/bit; copper cables at about 4–5 pJ/bit. A 5x gap. In a thermally limited rack, that gap is fatal.
Cost. A 1.6T pluggable optical module costs hundreds to over a thousand US dollars. With bandwidth per XPU still doubling, that unit price can't hold.
Reliability. Pluggable optical modules are considered the top reliability risk in today's data center networks — but because they are so easy to swap, the problem has never truly been solved. If one fails, pull it out, plug in a new one, and carry on.
The third point is where the talk really lands its punch. The "just swap it" tolerance doesn't hold for AI training. Restarting a training job costs hundreds of thousands to millions of dollars, and nobody wants to pay that over a single optical module.
We covered why pluggables are hitting this bottleneck in Have Pluggable Optics Hit the Wall? Understand This Bottleneck Before CPO.
3. Two Cuts at the DSP: Slow and Wide, Then Move the SerDes onto the XPU
GF tackles power by cutting from both the optical side and the electrical side — and both cuts target the same thing: digital signal processing (DSP).
Optical side: step back from 200G PAM4 to 50G NRZ, trading one lane for four. The bit error rate drops from 10^-6 to 10^-12, while required receive optical power falls by another 5 dB. With BER relaxed, the DSP can be removed almost entirely, leaving only lightweight forward error correction (FEC). The cost is 4x the lane count and 6 dB more laser power — but the 5 dB saved at the receiver nearly cancels it out. Net result: laser power is unchanged, and all the savings come from digital compute power.
We compare this "slow and wide" route with the trade-offs of other scale-up optical interconnect approaches in After Copper Runs Out for AI: Seven Paths to Scale-Up Optical Interconnect.
Electrical side: move the optical-electrical conversion point from the board edge onto the XPU. Electrical loss from the center of the server to the board edge is about 40 dB; with conversion moved onto the XPU, only 6–10 dB remains — removing 30–35 dB in one step. SerDes power drops by about 7x, and the retimer DSP in the pluggable disappears entirely, saving tens of watts of power and hundreds of dollars in cost.
Taken together, what CPO saves is not really "optical power" but the silicon that had to be burned to force high-speed signals through lossy channels.
4. Only Five Parts Left in the BOM: CPO Doesn't Just "Save a Little"
Barber compared against a teardown of a recent 1.6T pluggable optical module, naming each part that disappears:
The whole outer protective housing — needed because the module isn't in a controlled environment; CPO doesn't need it
PCB, discrete power management, discrete MCU, discrete memory — all folded into the SoC
Retimer DSP — already cut in the previous section
Standalone thermal structure — CPO is cooled together with the GPU
Complex optical assemblies — consolidated into a single re-matable fiber connector
Only five things remain: photodetector (PD), transimpedance amplifier (TIA), laser, laser driver and fiber coupler.
GF's two cost figures are blunt: the disappearing parts alone cut the cost of a pluggable in half; add lasers shared across more lanes, lowering per-lane cost, and CPO's effective cost can reach 20–30% of a pluggable.
A caveat: 20–30% is a target for once CPO is in volume production and yield and interoperability issues are solved — not today's price. Treat it as a direction, not a current quote.
5. Reliability: Move the Optical Engine into the Fab and Deliver by KGD Rules
This is the most structurally significant part of the talk. GF's approach to reliability isn't "make better optics" but redefining the optical engine as a semiconductor part:
Move the laser outside the box first. The laser is temperature-sensitive and the highest-risk component in the system — so don't solve it yet; put it outside (external laser source, ELS), keeping the same serviceability as today's pluggables: if it fails, pull it and replace it.
Cut part count from hundreds or thousands down to three. PIC, EIC and the fiber attach unit (FAU).
Assemble and test in a semiconductor cleanroom. A high-grade cleanroom nearly removes particles from the equation, driving the chance of dust in the optical path toward zero.
Run a full semiconductor quality and reliability test flow. The goal is stable operation for decades under harsh conditions.
Detachable fiber connector. Finishing the optical engine is only the start — it still has to be integrated into the XPU, mounted on the PCB and installed in the server. If a fiber pigtail dangles through the whole process, assembly risk and cost spiral out of control. So the fiber must be attachable at the very last step, just like today's cable harnesses.
The results: Meta's published long-term study shows 50 million hours of operation with no performance degradation and virtually undetectable link flaps; NVIDIA, in a session the same day, said CPO could improve time between incidents by an order of magnitude.
For why the laser and fiber coupling are CPO's most fragile links, see CPO's Most Fragile Link Is the Laser and Fiber-to-Chip: The Least Sexy Step in CPO That Holds Everyone Back.
6. SCALE: GF Isn't Selling Optics — It's Selling Known Good Die
GF's product is called SCALE (Silicon Photonics Co-packaged Advanced Light Engine): one EIC, one PIC and one fiber connector, fully assembled and tested, delivered to customers as a known good optical engine.
Key specs: supports bidirectional 50G NRZ and unidirectional four-wavelength operation under Optical Compute Interconnect (OCI) Gen 1; GF says the platform has headroom in both baud rate and wavelength count to support three to four OCI generations. The Q&A added two key points: SCALE is not monolithic integration — the PIC and EIC are two separate dies, and the EIC doesn't have to be made by GF; it can come from another foundry partner. SCALE also supports 200G PAM4, so it isn't tied to NRZ.
And the words "known good" come at a price:
Nobody wants to throw away a $50,000 GPU because of a bad optical engine.
So every unit must be 100% electro-optically tested. The difficulty is that this is inherently double-sided — electrical signals enter from below, optical signals from above. GF co-developed a handler with Advantest to make this viable for volume production. It is an easily overlooked step with a very deep moat.
We covered the financial performance of GF's silicon photonics line this year in Earnings Call Highlights: GlobalFoundries (GFS) | FY2026 Q2 — optical communications up 62% in the quarter and the full-year SiPho target doubled. That and this talk are two sides of the same story.

7. Three Technologies Truly Gating Volume Production
Channel density. A pluggable today has 8 optical lanes. Going "slow and wide" multiplies that by 4 to 32; and a CPO optical engine won't be 1.6T-class but 12.8T, another 8x — 256 optical lanes per optical engine. The Mach-Zehnder modulators (MZM) used in pluggables simply won't fit in the area, so micro-ring modulators (MRM) are the only option, with an area difference of about 1,000x. The same applies on the receive side: conventional CWDM demultiplexers are too large, so coupled ring resonators of similar size to MRMs are used, enabling a path from today's 4 wavelengths to 8, 16 and 32.
Advanced packaging. The EIC stacks on the PIC, and the PIC is integrated into the XPU package (at the substrate or interposer level). Die-to-die interconnect pitch must reach 45 µm; TSVs must carry 200G to 400G PAM4 signals, i.e., 60–120 GHz of bandwidth. Neither is an optics problem — both are packaging problems.
Detachable fiber connector. Three conditions must hold at the same time:
High fiber count — scale-up should be as point-to-point as possible; in an NVL72 rack each GPU already fans out to 18 switches, meaning 18 fibers out, and that number will only rise.
Low insertion loss — every extra 1 dB lost must be made up with 1 dB more laser power; and since lasers are inefficient, system power gets amplified 5 to 10x.
Broadband — the entire O-band must be usable, to keep flexibility as wavelength plans go from 4 to 8, 16 and 32.
8. The Counterargument: Optical Specs Exist, Interoperability and Mechanical Standards Don't
Barber's call to action is the most candid part of the talk and the biggest source of uncertainty for CPO today. He listed three gaps himself:
Optical side: OCI and IEEE have defined the specs well, but compliance and interoperability testing are still immature.
Electrical side: OIF and UCIe have standards, but the industry still relies heavily on proprietary specs; the standards haven't truly been adopted.
Mechanical side: no consensus at all. The same box, the same Z-height, the same fiber connector, the same electrical interface — none of these have converged.
An intriguing contrast: he pointed out that optical module MSAs (such as OSFP) are essentially mechanical standards, borrowing their optical and electrical specs from OIF and IEEE. What CPO lacks now is precisely that mechanical MSA layer.
The commercial consequence is direct: without interoperability, CPO becomes a closed business where each XPU is locked to one optical engine supplier. Economies of scale won't materialize, and the "20–30% of pluggable cost" estimate will naturally need a discount. This is the counter-signal CPO bulls should watch most closely — not that the technology can't be built, but that standards converge too slowly for the cost curve to come down.
9. What It Means for Taiwan's Supply Chain
Translate the talk's technology list into supply-chain terms, and the gains turn out to be very unevenly distributed:
Biggest beneficiaries: advanced packaging and test. EIC/PIC stacking, 45 µm micro-bumps, 120 GHz TSVs, double-sided electro-optical test handlers — the moats for all of these sit with foundries, OSATs and test equipment makers, not with traditional optical module makers. The detail that GF partnered with Advantest on the handler is worth a careful read by Taiwan's test industry.
Second beneficiaries: FAUs and detachable fiber connectors. High fiber count, low insertion loss and full O-band coverage must all hold at once — a higher bar than it looks, and a segment Taiwanese makers (FOCI, Largan, AuthenX and peers) can genuinely capture. Once "attach the fiber at the last step" becomes the industry's assembly norm, connector re-matability specs will directly become design constraints.
Neutral to positive: lasers. External lasers are explicitly retained as serviceable parts and won't disappear in the near term; while sharing across more lanes lowers per-lane cost, as wavelength counts go from 4 to 8, 16 and 32, total demand won't necessarily shrink.
Most at risk: assembly-only optical module makers. The parts that vanish from the BOM list in the previous section — PCB, power management, MCU, memory, retimer DSP, standalone thermal — cover exactly the highest value-add half of a pluggable optical module. Once CPO ramps, that half is structurally eliminated, not squeezed by price cuts.
Summary
The real signal of this talk isn't in any single number but in what it chose not to talk about. Barber didn't spend a minute proving optics beat copper — that debate ended in 2026. He spent all his time on yield, test, cleanrooms, reliability test flows, handlers and known good die.
This means CPO's decisive battleground has shifted from optical engineering to foundries, packaging houses and test houses. A product once defined by the optical communications industry is being taken over by the rules of the semiconductor industry — and the first question in any such takeover is always "can you guarantee every single unit is good?"
Three signals worth watching next: when OCI compliance/interoperability testing (plugfests) actually gets going, whether anyone steps up to converge a CPO mechanical MSA, and how fast actual capacity ramps for double-sided electro-optical test handlers. The first two determine whether the cost curve can come down; the third determines which year the volume production bottleneck lands in.
Related Reading
2026 OCP APAC Summit | NVIDIA | Gilad Shainer | Scaling the AI Factory: the NVIDIA keynote from the same event, whose reliability figures Barber cited repeatedly
The CPO Ecosystem Is Reshuffling: Foundries and OSATs Move from Supporting Role to Lead: the supply-chain version of this article's "shifting battleground" thesis
OIF Draws an Official Map for AI Interconnect: Three Networks, One pJ/bit Battlefield: why pJ/bit is CPO's only scoreboard
This article is for technology and industry trend analysis only and does not constitute investment advice.






















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